[U-Boot] [PATCH 3/3] OMAP3: am3517_evm: Misc. comment and option cleanup
Derald D. Woods
woods.technical at gmail.com
Fri Mar 4 05:14:16 CET 2016
- Make comment 'one-liners' truly one line
- Drop some CFI verbage and definitions
* NOR Support needs to be added with current conventions
Signed-off-by: Derald D. Woods <woods.technical at gmail.com>
---
include/configs/am3517_evm.h | 255 +++++++++++++++++++------------------------
1 file changed, 111 insertions(+), 144 deletions(-)
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 734b8ba..5b689a8 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -13,14 +13,17 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_SYS_CACHELINE_SIZE 64
+/* High Level Configuration Options */
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
+#define CONFIG_OMAP
#define CONFIG_OMAP_COMMON
+
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+#define CONFIG_SYS_NO_FLASH
+
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
@@ -28,59 +31,48 @@
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE 0x80100000
+#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
+
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap.h>
-/*
- * Display CPU and Board information
- */
+/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
-
-/* Clock Defines */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_OF_LIBFDT
-
+#define CONFIG_MISC_INIT_R
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
-/*
- * Size of malloc() pool
- */
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
+/* Clock Defines */
+#define V_OSCK 26000000 /* Clock output from T2 */
+#define V_SCLK (V_OSCK >> 1)
+
+/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (16 << 20)
-/*
- * DDR related
- */
-#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
-/*
- * Hardware drivers
- */
+/* Hardware drivers */
-/*
- * OMAP GPIO configuration
- */
+/* OMAP GPIO configuration */
#define CONFIG_OMAP_GPIO
-/*
- * NS16550 Configuration
- */
+/* NS16550 Configuration */
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-/*
- * select serial console configuration
- */
+/* select serial console configuration */
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
@@ -90,6 +82,8 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
115200}
+
+/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_OMAP_HSMMC
@@ -111,7 +105,6 @@
#define CONFIG_USB_STORAGE
#define CONGIG_CMD_STORAGE
-#define CONFIG_CMD_FAT
#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL
@@ -129,33 +122,29 @@
#endif /* CONFIG_USB_MUSB_AM35X */
/* commands to include */
+#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_EXT2 /* EXT2 Support */
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FS_GENERIC
-#define CONFIG_PARTITION_UUIDS
#define CONFIG_CMD_PART
#define CONFIG_CMD_ASKENV
-
#define CONFIG_CMD_BOOTZ
-
-#define CONFIG_CMD_I2C /* I2C serial bus support */
-#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_NAND /* NAND support */
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MMC
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
+#define CONFIG_CMD_MTDPARTS
-#define CONFIG_SYS_NO_FLASH
+/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
-/*
- * Ethernet
- */
+/* Ethernet */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_MII
@@ -165,14 +154,45 @@
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT 10
-/* UBI and NAND partitioning */
-#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
-#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
-#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
-#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
-#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
-#define CONFIG_MTD_DEVICE
-#define CONFIG_CMD_MTDPARTS
+/* Board NAND Info. */
+#ifdef CONFIG_NAND
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_NAND_OMAP_GPMC_PREFETCH
+#define CONFIG_BCH
+#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
+#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
+#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
+#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
+#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
+ /* to access nand */
+#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
+ /* to access */
+ /* nand at CS0 */
+#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
+ /* NAND devices */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
+ 11, 12, 13, 14, 16, 17, 18, 19, 20, \
+ 21, 22, 23, 24, 25, 26, 27, 28, 30, \
+ 31, 32, 33, 34, 35, 36, 37, 38, 39, \
+ 40, 41, 42, 44, 45, 46, 47, 48, 49, \
+ 50, 51, 52, 53, 54, 55, 56 }
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 13
+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+#define CONFIG_SYS_NAND_MAX_OOBFREE 2
+#define CONFIG_SYS_NAND_MAX_ECCPOS 56
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
+#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
/* NAND block size is 128 KiB. Synchronize these values with
* corresponding Device Tree entries in Linux:
* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
@@ -190,16 +210,11 @@
"8m(kernel)," \
"512k(dtb)," \
"-(rootfs)"
+#else
+#define MTDIDS_DEFAULT
+#define MTDPARTS_DEFAULT
+#endif /* CONFIG_NAND */
-/* Board NAND Info. */
-#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
- /* to access nand */
-#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
- /* to access */
- /* nand at CS0 */
-
-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
- /* NAND devices */
/* Environment information */
#define CONFIG_BOOTDELAY 10
@@ -267,22 +282,25 @@
"fi; " \
"else run nandboot; fi"
-/*
- * Miscellaneous configurable options
- */
+/* Miscellaneous configurable options */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
+#define CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_PARTITION_UUIDS
+
+/* We set the max number of command args high to avoid HUSH bugs. */
+#define CONFIG_SYS_MAXARGS 64
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE 512
/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 64 /* max number of command */
- /* args */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ + sizeof(CONFIG_SYS_PROMPT) + 16)
/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
@@ -299,16 +317,18 @@
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
+/* Physical Memory Map */
+#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
+#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE 0x800
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
+/* FLASH and environment organization */
/* **** PISMO SUPPORT *** */
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
@@ -323,31 +343,12 @@
/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#define CONFIG_NAND_OMAP_GPMC
-#define CONFIG_ENV_IS_IN_NAND
-#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
-
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
+#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
-
-/*-----------------------------------------------------------------------
- * CFI FLASH driver setup
- */
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
-
-/* Flash banks available */
-#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
- CONFIG_SYS_MAX_NAND_DEVICE)
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
+#define CONFIG_ENV_IS_IN_NAND
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
@@ -379,38 +380,4 @@
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
-/* NAND boot config */
-#define CONFIG_BCH
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-#define CONFIG_SYS_NAND_PAGE_COUNT 64
-#define CONFIG_SYS_NAND_PAGE_SIZE 2048
-#define CONFIG_SYS_NAND_OOBSIZE 64
-#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
-#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
- 11, 12, 13, 14, 16, 17, 18, 19, 20, \
- 21, 22, 23, 24, 25, 26, 27, 28, 30, \
- 31, 32, 33, 34, 35, 36, 37, 38, 39, \
- 40, 41, 42, 44, 45, 46, 47, 48, 49, \
- 50, 51, 52, 53, 54, 55, 56 }
-
-#define CONFIG_SYS_NAND_ECCSIZE 512
-#define CONFIG_SYS_NAND_ECCBYTES 13
-#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
-#define CONFIG_SYS_NAND_MAX_OOBFREE 2
-#define CONFIG_SYS_NAND_MAX_ECCPOS 56
-#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-
-/*
- * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 0x800FFFC0--0x80100000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80100000
-#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
-
#endif /* __CONFIG_H */
--
2.7.2
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