[U-Boot] [PATCH v3] arm: use common instructions applicable to armv7m & other arm archs

Vikas MANOCHA vikas.manocha at st.com
Thu Mar 10 18:44:47 CET 2016


Just a reminder to apply this patch.

Cheers,
Vikas

> -----Original Message-----
> From: Vikas MANOCHA
> Sent: Friday, February 05, 2016 10:43 AM
> To: albert.u.boot at aribaud.net; hs at denx.de
> Cc: Vikas MANOCHA; Simon Glass; Stefan Roese; Przemyslaw Marczak;
> rev13 at wp.pl; open list
> Subject: [PATCH v3] arm: use common instructions applicable to armv7m &
> other arm archs
> 
> This patch cleans the code by using instructions allowed for armv7m as well
> as other Arm archs.
> 
> Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
> Reviewed-by: Simon Glass <sjg at chromium.org>
> Reviewed-by: Heiko Schocher <hs at denx.de>
> ---
> Changes in v3: moved the comment to right location.
> Changes in v2: reword message commit. Removed info regarding BIC
> instruction on SP, was creating confusion.
> 
>  arch/arm/lib/crt0.S | 25 +++++++------------------
>  1 file changed, 7 insertions(+), 18 deletions(-)
> 
> diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index 2f4c14e..d9078aa
> 100644
> --- a/arch/arm/lib/crt0.S
> +++ b/arch/arm/lib/crt0.S
> @@ -71,18 +71,12 @@ ENTRY(_main)
>   */
> 
>  #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
> -	ldr	sp, =(CONFIG_SPL_STACK)
> +	ldr	r0, =(CONFIG_SPL_STACK)
>  #else
> -	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
> +	ldr	r0, =(CONFIG_SYS_INIT_SP_ADDR)
>  #endif
> -#if defined(CONFIG_CPU_V7M)	/* v7M forbids using SP as BIC
> destination */
> -	mov	r3, sp
> -	bic	r3, r3, #7
> -	mov	sp, r3
> -#else
> -	bic	sp, sp, #7	/* 8-byte alignment for ABI compliance */
> -#endif
> -	mov	r0, sp
> +	bic	r0, r0, #7	/* 8-byte alignment for ABI compliance */
> +	mov	sp, r0
>  	bl	board_init_f_alloc_reserve
>  	mov	sp, r0
>  	/* set up gd here, outside any C code */ @@ -100,14 +94,9 @@
> ENTRY(_main)
>   * 'here' but relocated.
>   */
> 
> -	ldr	sp, [r9, #GD_START_ADDR_SP]	/* sp = gd->start_addr_sp */
> -#if defined(CONFIG_CPU_V7M)	/* v7M forbids using SP as BIC
> destination */
> -	mov	r3, sp
> -	bic	r3, r3, #7
> -	mov	sp, r3
> -#else
> -	bic	sp, sp, #7	/* 8-byte alignment for ABI compliance */
> -#endif
> +	ldr	r0, [r9, #GD_START_ADDR_SP]	/* sp = gd->start_addr_sp */
> +	bic	r0, r0, #7	/* 8-byte alignment for ABI compliance */
> +	mov	sp, r0
>  	ldr	r9, [r9, #GD_BD]		/* r9 = gd->bd */
>  	sub	r9, r9, #GD_SIZE		/* new GD is below bd */
> 
> --
> 1.9.1



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