[U-Boot] [PATCH 38/69] x86: Move common MRC Kconfig options to the common file

[Bin Meng]

Hi Simon,

On Mon, Mar 7, 2016 at 10:28 AM, Simon Glass <sjg at chromium.org> wrote:
> At present the MRC options are private to ivybridge. Other Intel CPUs also
> use these settings. Move them to a common place.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/x86/Kconfig               | 39 +++++++++++++++++++++++++++++++++++++++
>  arch/x86/cpu/ivybridge/Kconfig | 27 +--------------------------
>  2 files changed, 40 insertions(+), 26 deletions(-)
>
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index a0bd344..29df78c 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -266,6 +266,45 @@ config ENABLE_MRC_CACHE
>           to be used for speeding up boot time on future reboots and/or
>           power cycles.
>
> +config HAVE_MRC
> +        bool "Add a System Agent binary"
> +       depends on !HAVE_FSP

nits: indention of "depends on.." is wrong.

> +        help
> +          Select this option to add a System Agent binary to
> +          the resulting U-Boot image. MRC stands for Memory Reference Code.
> +          It is a binary blob which U-Boot uses to set up SDRAM.
> +
> +          Note: Without this binary U-Boot will not be able to set up its
> +          SDRAM so will not boot.
> +
> +config CACHE_MRC_BIN
> +       bool
> +       depends on HAVE_MRC
> +       default n
> +
> +config CACHE_MRC_SIZE_KB
> +       int
> +       depends on HAVE_MRC
> +       default 512
> +
> +config DCACHE_RAM_BASE
> +       hex
> +       depends on HAVE_MRC
> +
> +config DCACHE_RAM_SIZE
> +       hex
> +       depends on HAVE_MRC
> +       default 0x40000

Can we add some help text to the above options?

> +
> +config DCACHE_RAM_MRC_VAR_SIZE
> +       hex
> +       depends on HAVE_MRC
> +       help
> +         This is the amount of CAR (Cache as RAM) reserved for use by the
> +         memory reference code. This depends on the implementation of the
> +         memory reference code and must be set correctly or the board will
> +         not boot.
> +
>  config SMP
>         bool "Enable Symmetric Multiprocessing"
>         default n
> diff --git a/arch/x86/cpu/ivybridge/Kconfig b/arch/x86/cpu/ivybridge/Kconfig
> index 0819347..e23d01a 100644
> --- a/arch/x86/cpu/ivybridge/Kconfig
> +++ b/arch/x86/cpu/ivybridge/Kconfig
> @@ -7,43 +7,18 @@
>
>  config NORTHBRIDGE_INTEL_IVYBRIDGE
>         bool
> -       select CACHE_MRC_BIN
> +       select CACHE_MRC_BIN if HAVE_MRC
>
>  if NORTHBRIDGE_INTEL_IVYBRIDGE
>
> -config CACHE_MRC_BIN
> -       bool
> -       default n
> -
> -config CACHE_MRC_SIZE_KB
> -       int
> -       default 512
> -
>  config DCACHE_RAM_BASE
> -       hex
>         default 0xff7e0000
>
>  config DCACHE_RAM_SIZE
> -       hex
>         default 0x20000
>
> -config HAVE_MRC
> -        bool "Add a System Agent binary"
> -        help
> -          Select this option to add a System Agent binary to
> -          the resulting U-Boot image. MRC stands for Memory Reference Code.
> -          It is a binary blob which U-Boot uses to set up SDRAM.
> -
> -          Note: Without this binary U-Boot will not be able to set up its
> -          SDRAM so will not boot.
> -
>  config DCACHE_RAM_MRC_VAR_SIZE
> -       hex
>         default 0x4000
> -       help
> -         This is the amount of CAR (Cache as RAM) reserved for use by the
> -         memory reference code. This should be set to 16KB (0x4000 hex)
> -         so that MRC has enough space to run.
>
>  config CPU_SPECIFIC_OPTIONS
>         def_bool y
> --

Regards,
Bin