[U-Boot] [PATCH 44/69] x86: link: Add pin configuration to the device tree

[Bin Meng]

Hi Simon,

On Mon, Mar 7, 2016 at 10:28 AM, Simon Glass <sjg at chromium.org> wrote:
> At present pin configuration on link does not use the standard mechanism,
> but some rather ugly custom code. As a first step to resolving this, add the
> pin configuration to the device tree.
>
> Four of the GPIOs must be available before relocation (for SDRAM pin
> strapping).
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/x86/dts/chromebook_link.dts | 151 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 151 insertions(+)
>
> diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
> index 7ddbe43..ce0fe47 100644
> --- a/arch/x86/dts/chromebook_link.dts
> +++ b/arch/x86/dts/chromebook_link.dts
> @@ -1,5 +1,7 @@
>  /dts-v1/;
>
> +#include <dt-bindings/gpio/x86-gpio.h>
> +
>  /include/ "skeleton.dtsi"
>  /include/ "keyboard.dtsi"
>  /include/ "serial.dtsi"
> @@ -62,6 +64,155 @@
>                 intel,duplicate-por;
>         };
>
> +       pch_pinctrl {
> +               compatible = "intel,x86-pinctrl";
> +               u-boot,dm-pre-reloc;
> +               reg = <0 0>;
> +
> +               gpio_a0 {
> +                       gpio-offset = <0 0>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a1 {
> +                       gpio-offset = <0 >;
> +                       output-value = <1>;

No "direction = <PIN_OUTPUT>"? and no "mode-gpio"?

> +               };
> +
> +               gpio_a3 {
> +                       gpio-offset = <0 3>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a5 {
> +                       gpio-offset = <0 5>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a6 {
> +                       gpio-offset = <0 6>;
> +                       output-value = <1>;

ditto.

> +               };
> +
> +               gpio_a7 {
> +                       gpio-offset = <0 7>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +                       invert;
> +               };
> +
> +               gpio_a8 {
> +                       gpio-offset = <0 8>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +                       invert;
> +               };
> +
> +               gpio_a9 {
> +                       gpio-offset = <0 9>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a10 {
> +                       u-boot,dm-pre-reloc;
> +                       gpio-offset = <0 10>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a11 {
> +                       gpio-offset = <0 11>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a12 {
> +                       gpio-offset = <0 12>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +                       invert;
> +               };
> +
> +               gpio_a14 {
> +                       gpio-offset = <0 14>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +                       invert;
> +               };
> +
> +               gpio_a15 {
> +                       gpio-offset = <0 15>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +                       invert;
> +               };
> +
> +               gpio_a21 {
> +                       gpio-offset = <0 21>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_a24 {
> +                       gpio-offset = <0 24>;
> +                       mode-gpio;
> +                       output-value = <0>;
> +                       direction = <PIN_OUTPUT>;
> +               };
> +
> +               gpio_a28 {
> +                       gpio-offset = <0 28>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_b4 {
> +                       gpio-offset = <0x30 4>;
> +                       mode-gpio;
> +                       direction = <PIN_OUTPUT>;
> +                       output-value = <1>;
> +               };
> +
> +               gpio_b9 {
> +                       u-boot,dm-pre-reloc;
> +                       gpio-offset = <0x30 9>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_b10 {
> +                       u-boot,dm-pre-reloc;
> +                       gpio-offset = <0x30 10>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_b11 {
> +                       u-boot,dm-pre-reloc;
> +                       gpio-offset = <0x30 11>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_b25 {
> +                       gpio-offset = <0x30 25>;
> +                       mode-gpio;
> +                       direction = <PIN_INPUT>;
> +               };
> +
> +               gpio_b28 {
> +                       gpio-offset = <0x30 28>;
> +                       mode-gpio;
> +                       direction = <PIN_OUTPUT>;
> +                       output-value = <1>;
> +               };
> +
> +       };
> +
>         pci {
>                 compatible = "pci-x86";
>                 #address-cells = <3>;
> --

Regards,
Bin