[U-Boot] [PATCH v3 00/10] x86: Add support for samus
Simon Glass
sjg at chromium.org
Wed Mar 16 14:44:33 CET 2016
This series adds support for samus, the Chromebook Pixel 2015. Since it is
only the second board added that does not use an FSP, there is quite a bit
of refactoring involved to avoid code duplication.
Samus uses roughly the same binary blobs as link, except now there is one
more called the reference code binary. The only available binary for this
is a coreboot 'rmodule' extracted from flash. This is a simplified ELF
format so it fairly easy to load and use.
It is also possible to boot U-Boot from coreboot on samus. This works well
but for a delay for non-existent IDE on start-up. The standard build does
not work with binaries taken from flash, so it isn't easy to replicate
this - you'll just have to take my word for it. I am working on getting that
figured out - coreboot recently gained upstream support for loading U-Boot
as a payload, so it should be possible to get this working nicely before
long.
In any case much of the code comes from coreboot - individual files are
credited with their source.
Perhaps the main value of this series is the improved non-FSP support and
additions for broadwell, which samus uses. It should make it easier to add
support for future non-FSP platforms.
Changes in v3:
- Add more detail to the commit message and code comments
- Add new patch top include missing pci.h header in me_common.c
- Add new patch top include missing pci.h header in power_state.c
- Add source coreboot version information to the commit message
- Rename pch_common.c to pch.c
Changes in v2:
- Rename sdram to mrc
- Rename sdram_common.c to mrc.c
Simon Glass (10):
arm: Add a 64-bit division routine to the private library
dhry: Correct dhrystone calculation for fast machines
x86: Move common PCH code into a common place
x86: Add common SDRAM-init code
x86: ivybridge: Convert to use the common SDRAM code
x86: dts: Drop memory SPD compatible string
x86: Support a chained-boot development flow
x86: broadwell: Add missing pci.h header in power_state.c
x86: Add missing pci.h header in me_common.h
x86: Add support for the samus chromebook
arch/arm/lib/Makefile | 3 +-
arch/arm/lib/_uldivmod.S | 245 ++++++++++++
arch/x86/cpu/broadwell/power_state.c | 1 +
arch/x86/cpu/intel_common/Makefile | 2 +
arch/x86/cpu/intel_common/mrc.c | 271 +++++++++++++
arch/x86/cpu/intel_common/pch.c | 25 ++
arch/x86/cpu/ivybridge/cpu.c | 1 +
arch/x86/cpu/ivybridge/sata.c | 47 +--
arch/x86/cpu/ivybridge/sdram.c | 394 ++++---------------
arch/x86/cpu/start.S | 80 ++++
arch/x86/dts/Makefile | 1 +
arch/x86/dts/chromebook_link.dts | 1 -
arch/x86/dts/chromebook_samus.dts | 628 ++++++++++++++++++++++++++++++
arch/x86/include/asm/arch-ivybridge/pch.h | 53 ---
arch/x86/include/asm/me_common.h | 1 +
arch/x86/include/asm/mrc_common.h | 55 +++
arch/x86/include/asm/pch_common.h | 56 +++
board/google/Kconfig | 13 +
board/google/chromebook_samus/Kconfig | 40 ++
board/google/chromebook_samus/MAINTAINERS | 6 +
board/google/chromebook_samus/Makefile | 7 +
board/google/chromebook_samus/samus.c | 18 +
configs/chromebook_samus_defconfig | 51 +++
doc/README.x86 | 81 ++++
include/configs/chromebook_samus.h | 29 ++
include/configs/x86-chromebook.h | 3 +-
include/fdtdec.h | 1 -
lib/dhry/cmd_dhry.c | 8 +-
lib/fdtdec.c | 1 -
29 files changed, 1719 insertions(+), 403 deletions(-)
create mode 100644 arch/arm/lib/_uldivmod.S
create mode 100644 arch/x86/cpu/intel_common/mrc.c
create mode 100644 arch/x86/cpu/intel_common/pch.c
create mode 100644 arch/x86/dts/chromebook_samus.dts
create mode 100644 arch/x86/include/asm/mrc_common.h
create mode 100644 arch/x86/include/asm/pch_common.h
create mode 100644 board/google/chromebook_samus/Kconfig
create mode 100644 board/google/chromebook_samus/MAINTAINERS
create mode 100644 board/google/chromebook_samus/Makefile
create mode 100644 board/google/chromebook_samus/samus.c
create mode 100644 configs/chromebook_samus_defconfig
create mode 100644 include/configs/chromebook_samus.h
--
2.7.0.rc3.207.g0ac5344
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