[U-Boot] [PATCH 1/3] armv8/ls1043: Add workaround for DDR erratum A-008850

[york sun]

On 03/15/2016 10:59 PM, Shengzhou Liu wrote:
> Barrier transactions from CCI400 need to be disabled till
> the DDR is configured, otherwise it may lead to system hang.
> The patch adds workaround to fix the erratum.
> 
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu at nxp.com>
> ---
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c           | 18 ++++++++++++++++++
>  arch/arm/include/asm/arch-fsl-layerscape/config.h |  1 +
>  board/freescale/ls1043aqds/ddr.c                  | 21 +++++++++++++++++++++
>  board/freescale/ls1043aqds/ls1043aqds.c           |  8 --------
>  board/freescale/ls1043ardb/ddr.c                  | 22 ++++++++++++++++++++++
>  board/freescale/ls1043ardb/ls1043ardb.c           |  8 --------
>  include/fsl_ddr_sdram.h                           |  4 ++++
>  7 files changed, 66 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index 213ce3a..816bf1b 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -12,6 +12,8 @@
>  #include <asm/io.h>
>  #include <asm/global_data.h>
>  #include <asm/arch-fsl-layerscape/config.h>
> +#include <fsl_ddr_sdram.h>
> +#include <fsl_ddr.h>
>  #ifdef CONFIG_CHAIN_OF_TRUST
>  #include <fsl_validate.h>
>  #endif
> @@ -231,6 +233,21 @@ static void erratum_a009660(void)
>  #endif
>  }
>  
> +static void erratum_a008850(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
> +	/* part 1 of 2 */
> +	struct ccsr_cci400 __iomem *cci = (void *)CONFIG_SYS_CCI400_ADDR;
> +	struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
> +
> +	/* disables propagation of barrier transactions to DDRC from CCI400 */
> +	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
> +
> +	/* disable the re-ordering in DDRC */
> +	ddr_out32(&ddr->eor, DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS);
> +#endif
> +}
> +
>  void fsl_lsch2_early_init_f(void)
>  {
>  	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
> @@ -255,6 +272,7 @@ void fsl_lsch2_early_init_f(void)
>  		 CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
>  
>  	/* Erratum */
> +	erratum_a008850();
>  	erratum_a009929();
>  	erratum_a009660();
>  }
> diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> index b0c112b..6ec7e50 100644
> --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
> +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
> @@ -176,6 +176,7 @@
>  #define GICD_BASE		0x01401000
>  #define GICC_BASE		0x01402000
>  
> +#define CONFIG_SYS_FSL_ERRATUM_A008850
>  #define CONFIG_SYS_FSL_ERRATUM_A009663
>  #define CONFIG_SYS_FSL_ERRATUM_A009929
>  #define CONFIG_SYS_FSL_ERRATUM_A009942
> diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
> index 3d3c533..07d61f5 100644
> --- a/board/freescale/ls1043aqds/ddr.c
> +++ b/board/freescale/ls1043aqds/ddr.c
> @@ -7,6 +7,8 @@
>  #include <common.h>
>  #include <fsl_ddr_sdram.h>
>  #include <fsl_ddr_dimm_params.h>
> +#include <fsl_ddr.h>
> +#include <asm/io.h>
>  #ifdef CONFIG_FSL_DEEP_SLEEP
>  #include <fsl_sleep.h>
>  #endif
> @@ -105,6 +107,24 @@ found:
>  #endif
>  }
>  
> +static void erratum_a008850(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
> +	/* part 2 of 2 */
> +	struct ccsr_cci400 __iomem *cci = (void *)CONFIG_SYS_CCI400_ADDR;
> +	struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
> +	u32 tmp;
> +
> +	/* enable propagation of barrier transactions to DDRC from CCI400 */
> +	out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
> +
> +	/* enable the re-ordering in DDRC */
> +	tmp = ddr_in32(&ddr->eor);
> +	tmp &= ~(DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS);
> +	ddr_out32(&ddr->eor, tmp);
> +#endif
> +}
> +
>  phys_size_t initdram(int board_type)
>  {
>  	phys_size_t dram_size;
> @@ -116,6 +136,7 @@ phys_size_t initdram(int board_type)
>  
>  	dram_size = fsl_ddr_sdram();
>  #endif
> +	erratum_a008850();
>  
>  #ifdef CONFIG_FSL_DEEP_SLEEP
>  	fsl_dp_ddr_restore();

Shengzhou,

Is there any ill-effect if the second part is missed? I am concerned if a
customer board misses this part. Is there anyway to put the second part into soc
file?

York