[U-Boot] ARM: DRA7: DDR: Enable SR in Power Management Control

[Tom Rini]

On Wed, Mar 09, 2016 at 05:39:56PM +0530, Lokesh Vutla wrote:

> From: Nishanth Menon <nm at ti.com>
> 
> If EMIF is idle for certain amount of DDR cycles, EMIF will put the
> DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register
> is programmed. And also before entering suspend-resume ddr needs to
> be put in self-refresh. Linux kernel does not program this register
> before entering suspend and relies on u-boot setting.
> So configuring it in u-boot.
> 
> Signed-off-by: Nishanth Menon <nm at ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla at ti.com>
> Tested-by: Tom Rini <trini at konsulko.com>
> Reviewed-by: Tom Rini <trini at konsulko.com>

Applied to u-boot/master, thanks!

-- 
Tom
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