[U-Boot] [PATCH 1/3 v3] fsl/ddr: Revise erratum a009942 and clean related erratum

[york sun]

On 11/08/2016 02:55 AM, Shengzhou Liu wrote:
> - add additional function erratum_a009942_check_cpo to check if the
>   board needs tuning CPO calibration for optimal setting.
> - move ERRATUM_A009942(with revision to check cpo_sample option) from
>   fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
> - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
> - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu at nxp.com>
> ---
> v2: fix a typo
> v3: add reading POR value of debug_29 before changing.
>
>  arch/arm/cpu/armv8/fsl-layerscape/cpu.c   |   7 +-
>  arch/powerpc/cpu/mpc85xx/cpu_init.c       |   6 +-
>  arch/powerpc/include/asm/config_mpc85xx.h |   2 -
>  board/freescale/ls1021aqds/ls1021aqds.c   |   6 +-
>  drivers/ddr/fsl/ctrl_regs.c               | 134 +++++++++++++++++++++++++++++-
>  drivers/ddr/fsl/fsl_ddr_gen4.c            |  23 -----
>  drivers/ddr/fsl/mpc85xx_ddr_gen3.c        |   3 -
>  include/fsl_ddr.h                         |   2 +
>  include/fsl_ddr_sdram.h                   |   3 +-
>  9 files changed, 151 insertions(+), 35 deletions(-)
>


Shengzhou,

This patch causes compiling error for qemu-ppce500, and warnings for 
multiple T series platforms (eg T1040RDB).

I noticed you have later patch fixing compiling warning. Please reorder 
your patch to make git bisect happy.

York