[U-Boot] [PATCH 00/11] ARM: uniphier: UniPhier SoC code updates
Masahiro Yamada
yamada.masahiro at socionext.com
Thu Oct 27 16:46:59 CEST 2016
- DDR PHY init code updates
- Some bug fixes
Masahiro Yamada (11):
ARM: uniphier: enable SSC for more PLLs for LD20 SoC
ARM: uniphier: remove unused board attribute macros
ARM: uniphier: update DRAM init code for LD20 SoC (3rd)
ARM: uniphier: rename ddrphy-ld20-regs.h to ddruqphy-regs.h
ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8
ARM: uniphier: enable clocks to MIO/STDMAC on LD11 if USB is enabled
ARM: uniphier: do not run harmful code for USB boot mode of LD11 ES3
ARM: uniphier: rework existing DDR PHY code to reuse for LD11 SoC
ARM: uniphier: refactor DDR PHY parameter dump command
ARM: uniphier: support DDR PHY parameter dump command for LD11
ARM: uniphier: update DRAM init code for LD11 SoC
arch/arm/mach-uniphier/Kconfig | 3 +-
arch/arm/mach-uniphier/clk/clk-ld11.c | 19 +-
arch/arm/mach-uniphier/clk/dpll-ld20.c | 9 +-
arch/arm/mach-uniphier/clk/pll-ld20.c | 15 +-
arch/arm/mach-uniphier/dram/cmd_ddrphy.c | 236 +++++++-----
arch/arm/mach-uniphier/dram/ddrphy-init.h | 17 +
arch/arm/mach-uniphier/dram/ddrphy-ld4.c | 47 ++-
arch/arm/mach-uniphier/dram/ddrphy-regs.h | 282 +++++++-------
arch/arm/mach-uniphier/dram/ddrphy-training.c | 95 ++---
.../dram/{ddrphy-ld20-regs.h => ddruqphy-regs.h} | 7 +-
arch/arm/mach-uniphier/dram/umc-ld11.c | 415 +++++++++++++++++++--
arch/arm/mach-uniphier/dram/umc-ld20.c | 113 ++++--
arch/arm/mach-uniphier/dram/umc-ld4.c | 4 +-
arch/arm/mach-uniphier/dram/umc-pro4.c | 4 +-
arch/arm/mach-uniphier/dram/umc-sld8.c | 4 +-
arch/arm/mach-uniphier/init.h | 10 +-
arch/arm/mach-uniphier/sc64-regs.h | 2 +
17 files changed, 867 insertions(+), 415 deletions(-)
create mode 100644 arch/arm/mach-uniphier/dram/ddrphy-init.h
rename arch/arm/mach-uniphier/dram/{ddrphy-ld20-regs.h => ddruqphy-regs.h} (96%)
--
1.9.1
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