[U-Boot] [PATCH 1/2][v2] arch: powerpc: update the IFC IP input clock

[york sun]

On 09/07/2016 01:36 AM, Prabhakar Kushwaha wrote:
> IFC IP clock is always a constant divisor of platform clock
> pre-defined per SoC. Clock control register (CCR) used in
> current implementation governs IFC IP output clock.
>
> So update IFC IP clock to be defined as per predefined clock
> divisor of platform clock.
>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>
> ---
> Changes for v2: Split the patch in 2 patch set
>
>  README                                    |  3 +++
>  arch/powerpc/cpu/mpc85xx/speed.c          | 10 ++--------
>  arch/powerpc/include/asm/config_mpc85xx.h |  9 +++++++++
>  3 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/README b/README
> index 30d7ee3..873a24c 100644
> --- a/README
> +++ b/README
> @@ -533,6 +533,9 @@ The following options need to be configured:
>  		CONFIG_SYS_FSL_IFC_LE
>  		Defines the IFC controller register space as Little Endian
>
> +		CONFIG_SYS_FSL_IFC_CLK_DIV
> +		Defines divider of platform clock(clock input to IFC controller).
> +
>  		CONFIG_SYS_FSL_PBL_PBI
>  		It enables addition of RCW (Power on reset configuration) in built image.
>  		Please refer doc/README.pblimage for more details
> diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
> index e732969..ea92ff3 100644
> --- a/arch/powerpc/cpu/mpc85xx/speed.c
> +++ b/arch/powerpc/cpu/mpc85xx/speed.c
> @@ -27,10 +27,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  void get_sys_info(sys_info_t *sys_info)
>  {
>  	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> -#ifdef CONFIG_FSL_IFC
> -	struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
> -	u32 ccr;
> -#endif
>  #ifdef CONFIG_FSL_CORENET
>  	volatile ccsr_clk_t *clk = (void *)(CONFIG_SYS_FSL_CORENET_CLK_ADDR);
>  	unsigned int cpu;
> @@ -641,10 +637,8 @@ void get_sys_info(sys_info_t *sys_info)
>  #endif
>
>  #if defined(CONFIG_FSL_IFC)
> -	ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
> -	ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
> -
> -	sys_info->freq_localbus = sys_info->freq_systembus / ccr;
> +	sys_info->freq_localbus = sys_info->freq_systembus /
> +						CONFIG_SYS_FSL_IFC_CLK_DIV;
>  #endif
>  }
>

Prabhakar,

With these changes, you change the freq_localbus from the output of 
localbus to the internal clock. As far as I can tell, this variable is 
only used for display in U-Boot, and fixup bus-frequency in device tree 
for "fsl,elbc" and "fsl,pq3-localbus". I don't think kernel uses the 
clock though. The same variable is also used for mpc86xx. It may be a 
good idea to document this change in commit message and inline comment.

York