[U-Boot] [PATCH 21/21] arm: imx: add i.MX6ULL 14x14 EVK board support

[Jagan Teki]

Hi Peng,

On Thu, Sep 8, 2016 at 7:05 AM, Peng Fan <van.freenix at gmail.com> wrote:
> Hi Jagan,
> On Wed, Sep 07, 2016 at 08:21:07PM +0530, Jagan Teki wrote:
>>On Thu, Aug 11, 2016 at 11:32 AM, Peng Fan <van.freenix at gmail.com> wrote:
>>> Add i.MX6ULL EVK board support:
>>> Add device tree file, which is copied from NXP Linux.
>>> Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR.
>>> The uart iomux settings are still keeped in board file.
>>>
>>> Boot Log:
>>> U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800)
>>>
>>> CPU:   Freescale i.MX6ULL rev1.0 at 396MHz
>>> CPU:   Commercial temperature grade (0C to 95C) at 15C
>>> Reset cause: POR
>>> Model: Freescale i.MX6 ULL 14x14 EVK Board
>>> Board: MX6ULL 14x14 EVK
>>> DRAM:  512 MiB
>>> MMC:   initialized IMX pinctrl driver
>>> FSL_SDHC: 0, FSL_SDHC: 1
>>
>><snip>
>>
>>> diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c
>>> new file mode 100644
>>> index 0000000..489bf21
>>> --- /dev/null
>>> +++ b/board/freescale/mx6ullevk/mx6ullevk.c
>>> @@ -0,0 +1,99 @@
>>> +/*
>>> + * Copyright (C) 2016 Freescale Semiconductor, Inc.
>>> + *
>>> + * SPDX-License-Identifier:    GPL-2.0+
>>> + */
>>> +
>>> +#include <asm/arch/clock.h>
>>> +#include <asm/arch/iomux.h>
>>> +#include <asm/arch/imx-regs.h>
>>> +#include <asm/arch/crm_regs.h>
>>> +#include <asm/arch/mx6-pins.h>
>>> +#include <asm/arch/sys_proto.h>
>>> +#include <asm/gpio.h>
>>> +#include <asm/imx-common/iomux-v3.h>
>>> +#include <asm/imx-common/boot_mode.h>
>>> +#include <asm/io.h>
>>> +#include <common.h>
>>> +#include <fsl_esdhc.h>
>>> +#include <linux/sizes.h>
>>> +#include <mmc.h>
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
>>> +       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
>>> +       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
>>> +
>>> +int dram_init(void)
>>> +{
>>> +       gd->ram_size = imx_ddr_size();

Is this common call for all imx soc's to get the ddr size? because I
observed incorrect size when I call this function.

>>> +
>>> +       return 0;
>>> +}
>>> +
>>> +static iomux_v3_cfg_t const uart1_pads[] = {
>>> +       MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
>>> +       MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
>>> +};
>>> +
>>> +static void setup_iomux_uart(void)
>>> +{
>>> +       imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
>>> +}
>>> +
>>> +int board_mmc_get_env_dev(int devno)
>>> +{
>>> +       return devno;
>>> +}
>>> +
>>> +int mmc_map_to_kernel_blk(int devno)
>>> +{
>>> +       return devno;
>>> +}
>>> +
>>> +int board_early_init_f(void)
>>> +{
>>> +       setup_iomux_uart();
>>
>>Don't we need iomux settings for sdhc? I guess pinctrl for SD not
>>supporting now.
>
> The pinctrl driver will configure the pinmux, no need to add iomux settings
> in board file. In this patchset, I enabled PINCTRL, DM_MMC, DM_GPIO and etc.

Yeah, but the uart pinx mux are still in board file right?

-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.