[U-Boot] [RFC] board/liteboard: Add support for liteSOM and liteBoard

[Marcin Niestroj]

On 13.09.2016 20:23, Fabio Estevam wrote:
> Hi Marcin,
>
> On Wed, Aug 31, 2016 at 7:54 AM, Marcin Niestroj
> <m.niestroj at grinn-global.com> wrote:
>> liteSOM is a System On Module (http://grinn-global.com/litesom/). It
>> can't exists on its own, but will be used as part of other boards.
>>
>> Hardware specification:
>>  * NXP i.MX6UL processor
>>  * 256M or 512M DDR3 memory
>>  * optional eMMC (uSDHC2)
>>
>> liteBoard is a development board which uses liteSOM as its base.
>>
>> Hardware specification:
>>  * liteSOM (i.MX6UL, DRAM, eMMC)
>>  * Ethernet PHY (id 0)
>>  * USB host (usb_otg1)
>>  * MicroSD slot (uSDHC1)
>>
>> The main question is: how should liteSOM sources be integrated? I didn't
>> find similar modules, which are part of different boards in u-boot
>> tree. For now, I've put source into arch/arm/mach-litesom, but I guess
>> it is not the best place for them.
>
> What about placing it inside board/grinn/ ?

Putting them in board/grinn/ was my first idea (adding them to
board/litesom/). Unfortunately there is no easy way to build those
sources there.

Board sources are built depending on vendor and board name. As litesom
will never be a board name, these sources won't compile.

Additionally there is a possibility to add "common" directory inside
vendor directory (so there would be something like 
board/grinn/common/litesom/). This will work for all grinn boards. But 
the idea is
that some other vendor can make a board that will use litesom. And in
that case sources from board/grinn/ directory won't compile.

So my idea was to treat SOM go rather like SOC which is in arch/, than
BOARD.

>
>> +       .p0_mpdgctrl0 = 0x41490145,
>> +       .p0_mprddlctl = 0x40404546,
>> +       .p0_mpwrdlctl = 0x4040524D,
>> +};
>> +
>> +struct mx6_ddr_sysinfo ddr_sysinfo = {
>> +       .dsize = 0,
>> +       .cs_density = 20,
>> +       .ncs = 1,
>> +       .cs1_mirror = 0,
>> +       .rtt_wr = 2,
>> +       .rtt_nom = 1,           /* RTT_Nom = RZQ/2 */
>> +       .walat = 1,             /* Write additional latency */
>> +       .ralat = 5,             /* Read additional latency */
>> +       .mif3_mode = 3,         /* Command prediction working mode */
>> +       .bi_on = 1,             /* Bank interleaving enabled */
>> +       .sde_to_rst = 0x10,     /* 14 cycles, 200us (JEDEC default) */
>> +       .rst_to_cke = 0x23,     /* 33 cycles, 500us (JEDEC default) */
>> +       .ddr_type = DDR_TYPE_DDR3,
>
> Please rebase against U-Boot 2016.09. There are new fields now: refsel and refr.
>

Thanks for noticing.

-- 
Marcin Niestroj