[U-Boot] [Patch v6 8/9] armv8: ls1046ardb: Add LS1046ARDB board support

[york sun]

On 09/07/2016 03:08 AM, Gong Qianyu wrote:
> From: Mingkai Hu <mingkai.hu at nxp.com>
>
> LS1046ARDB Specification:
> -------------------------
> Memory subsystem:
>  * 8GByte DDR4 SDRAM (64bit bus)
>  * 512 Mbyte NAND flash
>  * Two 64 Mbyte high-speed SPI flash
>  * SD connector to interface with the SD memory card
>  * On-board 4G eMMC
>
> Ethernet:
>  * Two XFI 10G ports
>  * Two SGMII ports
>  * Two RGMII ports
>
> PCIe:
>  * PCIe1 (SerDes2 Lane0) to miniPCIe slot
>  * PCIe2 (SerDes2 Lane1) to x2 PCIe slot
>  * PCIe3 (SerDes2 Lane2) to x4 PCIe slot

Why don't you enable PCIe in the config file?

<snip>

> diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
> new file mode 100644
> index 0000000..a9b7dbd
> --- /dev/null
> +++ b/board/freescale/ls1046ardb/ddr.c
> @@ -0,0 +1,140 @@
> +/*
> + * Copyright 2016 Freescale Semiconductor, Inc.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <fsl_ddr_sdram.h>
> +#include <fsl_ddr_dimm_params.h>
> +#include "ddr.h"
> +#ifdef CONFIG_FSL_DEEP_SLEEP
> +#include <fsl_sleep.h>
> +#endif
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +void fsl_ddr_board_options(memctl_options_t *popts,
> +			   dimm_params_t *pdimm,
> +			   unsigned int ctrl_num)
> +{
> +	const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
> +	ulong ddr_freq;
> +
> +	if (ctrl_num > 1) {
> +		printf("Not supported controller number %d\n", ctrl_num);
> +		return;
> +	}
> +	if (!pdimm->n_ranks)
> +		return;
> +
> +	pbsp = udimms[0];
> +
> +	/* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr
> +	 * freqency and n_banks specified in board_specific_parameters table.
> +	 */
> +	ddr_freq = get_ddr_freq(0) / 1000000;
> +	while (pbsp->datarate_mhz_high) {
> +		if (pbsp->n_ranks == pdimm->n_ranks) {
> +			if (ddr_freq <= pbsp->datarate_mhz_high) {
> +				popts->clk_adjust = pbsp->clk_adjust;
> +				popts->wrlvl_start = pbsp->wrlvl_start;
> +				popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
> +				popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
> +				goto found;
> +			}
> +			pbsp_highest = pbsp;
> +		}
> +		pbsp++;
> +	}
> +
> +	if (pbsp_highest) {
> +		printf("Error: board specific timing not found for %lu MT/s\n",
> +		       ddr_freq);
> +		printf("Trying to use the highest speed (%u) parameters\n",
> +		       pbsp_highest->datarate_mhz_high);
> +		popts->clk_adjust = pbsp_highest->clk_adjust;
> +		popts->wrlvl_start = pbsp_highest->wrlvl_start;
> +		popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2;
> +		popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3;
> +	} else {
> +		panic("DIMM is not supported by this board");
> +	}
> +found:
> +	debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n",
> +	      pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb);
> +
> +	popts->data_bus_width = 0;	/* 64-bit data bus */
> +	popts->otf_burst_chop_en = 0;
> +	popts->burst_length = DDR_BL8;

You don't need to set these options unless you specifically want to 
disable on the fly burst chop. Do you?

York