[U-Boot] [PATCH 6/9] arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1

Chin Liang See clsee at altera.com
Thu Sep 15 09:28:34 CEST 2016


Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stabil LPDDR2 operation

Signed-off-by: Chin Liang See <clsee at altera.com>
---
 board/samtec/vining_fpga/qts/sdram_config.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/samtec/vining_fpga/qts/sdram_config.h b/board/samtec/vining_fpga/qts/sdram_config.h
index 74cb405..4230066 100644
--- a/board/samtec/vining_fpga/qts/sdram_config.h
+++ b/board/samtec/vining_fpga/qts/sdram_config.h
@@ -49,6 +49,9 @@
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP			6
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT		3
 #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT		200
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2
+#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 2
 #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC			0
 #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE			0
 #define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST			0x0
-- 
2.2.2



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