[U-Boot] [PATCH 3/9] arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1
Marek Vasut
marex at denx.de
Mon Sep 19 16:24:20 CEST 2016
On 09/15/2016 09:27 AM, Chin Liang See wrote:
> Adding new handoff for SDRAM ctrcfg.extratime1 which is
> required for stabil LPDDR2 operation
Same comment as 2/9
> Signed-off-by: Chin Liang See <clsee at altera.com>
> ---
> board/denx/mcvevk/qts/sdram_config.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/board/denx/mcvevk/qts/sdram_config.h b/board/denx/mcvevk/qts/sdram_config.h
> index 30c4d7d..0328850 100644
> --- a/board/denx/mcvevk/qts/sdram_config.h
> +++ b/board/denx/mcvevk/qts/sdram_config.h
> @@ -49,6 +49,9 @@
> #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 5
> #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 3
> #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 512
> +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2
> +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2
> +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 2
> #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 0
> #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 0
> #define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x0
>
--
Best regards,
Marek Vasut
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