[U-Boot] [PATCH] armv8: fsl-layerscape: Update ddr erratum a008336

[york sun]

On 08/26/2016 03:42 AM, Shengzhou Liu wrote:
> DDR erratum A008336 only applies to DDR controller v5.2.0.
> DDR controller v5.2.1 already has default 0x43b30002 in
> EDDRTQCR1 register for optimal performance.
>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu at nxp.com>
> ---


Applied to fsl-qoriq master. Awaiting upstream. Thanks.

York