[U-Boot] [PATCH v2 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

[Simon Glass]

On 8 September 2016 at 19:19, Kever Yang <kever.yang at rock-chips.com> wrote:
> Update PPLL to 676MHz and PMU_PCLK to 48MHz, because:
> 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz
> can not,
> 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost
> than 99MHz,
> 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using
> internally for kernel,it suppose not to change the bus clock like pmu_pclk
> in kernel, so we want to change it in uboot.
>
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
>
> Changes in v2: None
>
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Acked-by: Simon Glass <sjg at chromium.org>