[U-Boot] [PATCH 30/82] x86: ivybridge: Fix types for 64-bit compilation
Simon Glass
sjg at chromium.org
Mon Sep 26 05:33:33 CEST 2016
Fix a few types that causes warnings on 64-bit machines.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
arch/x86/cpu/ivybridge/gma.c | 2 +-
arch/x86/cpu/ivybridge/sata.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
index 59866bd..cf0c91d 100644
--- a/arch/x86/cpu/ivybridge/gma.c
+++ b/arch/x86/cpu/ivybridge/gma.c
@@ -831,7 +831,7 @@ int gma_func0_init(struct udevice *dev)
mtrr_add_request(MTRR_TYPE_WRCOMB, base, 256 << 20);
mtrr_commit(true);
- gtt_bar = (void *)dm_pci_read_bar32(dev, 0);
+ gtt_bar = (void *)(ulong)dm_pci_read_bar32(dev, 0);
debug("GT bar %p\n", gtt_bar);
ret = gma_pm_init_pre_vbios(gtt_bar, rev);
if (ret)
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index 1ce8195..bf11d48 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -54,7 +54,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
mode = fdt_getprop(blob, node, "intel,sata-mode", NULL);
if (!mode || !strcmp(mode, "ahci")) {
- u32 abar;
+ ulong abar;
debug("SATA: Controller in AHCI mode\n");
@@ -73,7 +73,7 @@ static void bd82x6x_sata_init(struct udevice *dev, struct udevice *pch)
/* Initialize AHCI memory-mapped space */
abar = dm_pci_read_bar32(dev, 5);
- debug("ABAR: %08X\n", abar);
+ debug("ABAR: %08lx\n", abar);
/* CAP (HBA Capabilities) : enable power management */
reg32 = readl(abar + 0x00);
reg32 |= 0x0c006000; /* set PSC+SSC+SALP+SSS */
--
2.8.0.rc3.226.g39d4020
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