[U-Boot] [PATCH 50/82] x86: Add an SPL implementation
Simon Glass
sjg at chromium.org
Mon Sep 26 05:33:53 CEST 2016
SPL needs to set up the machine ready for loading 64-bit U-Boot and jumping
to it. Call the existing init routines in order to accomplish this.
Signed-off-by: Simon Glass <sjg at chromium.org>
---
arch/x86/include/asm/spl.h | 8 +++
arch/x86/lib/Makefile | 3 +
arch/x86/lib/spl.c | 149 +++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 160 insertions(+)
create mode 100644 arch/x86/include/asm/spl.h
create mode 100644 arch/x86/lib/spl.c
diff --git a/arch/x86/include/asm/spl.h b/arch/x86/include/asm/spl.h
new file mode 100644
index 0000000..a8bce98
--- /dev/null
+++ b/arch/x86/include/asm/spl.h
@@ -0,0 +1,8 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ * Written by Simon Glass <sjg at chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ *
+ * This file is required for SPL to build, but is empty.
+ */
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 1d9ebc0..1fa7f90 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -12,7 +12,9 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cmd_boot.o
obj-$(CONFIG_SEABIOS) += coreboot_table.o
obj-$(CONFIG_EFI) += efi/
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_CMD_BOOTEFI_HELLO) += HelloWorld32.o
+endif
obj-y += e820.o
obj-y += gcc.o
obj-y += init_helpers.o
@@ -39,6 +41,7 @@ endif
obj-y += tables.o
obj-$(CONFIG_CMD_ZBOOT) += zimage.o
obj-$(CONFIG_HAVE_FSP) += fsp/
+obj-$(CONFIG_SPL_BUILD) += spl.o
extra-$(CONFIG_USE_PRIVATE_LIBGCC) += lib.a
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
new file mode 100644
index 0000000..61d085f
--- /dev/null
+++ b/arch/x86/lib/spl.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2016 Google, Inc
+ *
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <spl.h>
+#include <asm/cpu.h>
+#include <asm/init_helpers.h>
+#include <asm/mtrr.h>
+#include <asm/processor.h>
+#include <asm-generic/sections.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int x86_spl_init(void)
+{
+ /*
+ * TODO(sjg at chromium.org): We use this area of RAM for the stack
+ * and global_data in SPL. Once U-Boot starts up and releocates it
+ * is not needed. We could make this a CONFIG option or perhaps
+ * place it immediately below CONFIG_SYS_TEXT_BASE.
+ */
+ char *ptr = (char *)0x110000;
+ int ret;
+
+ debug("%s starting\n", __func__);
+ ret = spl_init();
+ if (ret) {
+ debug("%s: spl_init() failed\n", __func__);
+ return ret;
+ }
+ preloader_console_init();
+
+ ret = arch_cpu_init();
+ if (ret) {
+ debug("%s: arch_cpu_init() failed\n", __func__);
+ return ret;
+ }
+ ret = arch_cpu_init_dm();
+ if (ret) {
+ debug("%s: arch_cpu_init_dm() failed\n", __func__);
+ return ret;
+ }
+ ret = print_cpuinfo();
+ if (ret) {
+ debug("%s: print_cpuinfo() failed\n", __func__);
+ return ret;
+ }
+ ret = dram_init();
+ if (ret) {
+ debug("%s: dram_init() failed\n", __func__);
+ return ret;
+ }
+ memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
+
+ /* TODO(sjg at chromium.org): Consider calling cpu_init_r() here */
+ ret = interrupt_init();
+ if (ret) {
+ debug("%s: interrupt_init() failed\n", __func__);
+ return ret;
+ }
+
+ gd->new_gd = (struct global_data *)ptr + 0x100;
+ memcpy(gd->new_gd, gd, sizeof(*gd));
+ arch_setup_gd(gd->new_gd);
+ gd->start_addr_sp = (ulong)ptr;
+
+ /* Cache the SPI flash. Otherwise copying the code to RAM takes ages */
+ ret = mtrr_add_request(MTRR_TYPE_WRBACK,
+ (1ULL << 32) - CONFIG_XIP_ROM_SIZE,
+ CONFIG_XIP_ROM_SIZE);
+ if (ret) {
+ debug("%s: SPI cache setup failed\n", __func__);
+ return ret;
+ }
+
+ return 0;
+}
+
+void board_init_f(ulong flags)
+{
+ int ret;
+
+ ret = x86_spl_init();
+ if (ret) {
+ debug("Error %d\n", ret);
+ hang();
+ }
+
+ /* Uninit CAR and jump to board_init_f_r() */
+ board_init_f_r_trampoline(gd->start_addr_sp);
+}
+
+void board_init_f_r(void)
+{
+ init_cache_f_r();
+ gd->flags &= ~GD_FLG_SERIAL_READY;
+ debug("cache status %d\n", dcache_status());
+ board_init_r(gd, 0);
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_BOARD;
+}
+
+int spl_start_uboot(void)
+{
+ return 0;
+}
+
+void spl_board_announce_boot_device(void)
+{
+ printf("SPI flash");
+}
+
+static int spl_board_load_image(struct spl_image_info *spl_image,
+ struct spl_boot_device *bootdev)
+{
+ spl_image->size = CONFIG_SYS_MONITOR_LEN;
+ spl_image->entry_point = CONFIG_SYS_TEXT_BASE;
+ spl_image->load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image->os = IH_OS_U_BOOT;
+ spl_image->name = "U-Boot";
+
+ debug("Loading to %x\n", spl_image->load_addr);
+
+ return 0;
+}
+SPL_LOAD_IMAGE_METHOD(0, BOOT_DEVICE_BOARD, spl_board_load_image);
+
+int spl_spi_load_image(void)
+{
+ return -EPERM;
+}
+
+void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
+{
+ int ret;
+
+ printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
+ ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
+ debug("ret=%d\n", ret);
+ while (1);
+}
--
2.8.0.rc3.226.g39d4020
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