[U-Boot] [PATCH 8/9] MIPS: add handling for generic and EJTAG exceptions
Paul Burton
paul.burton at imgtec.com
Mon Sep 26 12:29:31 CEST 2016
On Sunday, 25 September 2016 20:05:31 BST Daniel Schwierzeck wrote:
> Add exception handlers for generic and EJTAG exceptions. Most of
> the assembly code is imported from Linux kernel and adapted to U-Boot.
> The exception vector table will be reserved above the stack before
> U-Boot is relocated. The exception handlers will be installed and
> activated after relocation in the initr_traps hook function.
Hi Daniel,
This series looks good :) Just a couple of comments below.
>
> Generic exceptions are handled by showing a CPU register dump similar
> to Linux kernel. For example:
>
> malta # md 1
> 00000001:
> Ooops:
> $ 0 : 00000000 00000000 00000009 00000004
> $ 4 : 8ff7e108 00000000 0000003a 00000000
> $ 8 : 00000008 00000001 8ff7cd18 00000004
> $12 : 00000002 00000000 00000005 0000003a
> $16 : 00000004 00000040 00000001 00000001
> $20 : 00000000 8fff53c0 00000008 00000004
> $24 : ffffffff 8ffdea44
> $28 : 90001650 8ff7cd00 00000004 8ffe6818
> Hi : 00000000
> Lo : 00000004
> epc : 8ffe6848 (text bfc28848)
> ra : 8ffe6818 (text bfc28818)
> Status: 00000006
> Cause : 00000410 (ExcCode 04)
> BadVA : 8ff9e928
> PrId : 00019300
> ### ERROR ### Please RESET the board ###
Something I've had in the U-Boot source we use on Boston, Malta & SEAD-3 boards
internally for a while is the ability to longjmp back to the shell after an exception. It seems
to work pretty well & generally means exceptions are non-fatal. I'll submit that once this
goes in.
>
> EJTAG exceptions are checked for SDBBP and delegated to the SDBBP handler
> if necessary. Otherwise the debug mode will simply be exited. The SDBBP
> handler currently prints the contents of registers c0_depc and c0_debug.
> This could be extended in the future to handle semi-hosting according to
> the MIPS UHI specification.
>
> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck at gmail.com>
> ---
>
> arch/mips/include/asm/u-boot-mips.h | 4 +
> arch/mips/lib/Makefile | 2 +
> arch/mips/lib/genex.S | 214
> ++++++++++++++++++++++++++++++++++++ arch/mips/lib/traps.c |
> 104 ++++++++++++++++++
> 4 files changed, 324 insertions(+)
> create mode 100644 arch/mips/lib/genex.S
> create mode 100644 arch/mips/lib/traps.c
>
> diff --git a/arch/mips/include/asm/u-boot-mips.h
> b/arch/mips/include/asm/u-boot-mips.h index 1f527bb..71ff41d 100644
> --- a/arch/mips/include/asm/u-boot-mips.h
> +++ b/arch/mips/include/asm/u-boot-mips.h
> @@ -5,4 +5,8 @@
> #ifndef _U_BOOT_MIPS_H_
> #define _U_BOOT_MIPS_H_
>
> +void exc_handler(void);
> +void except_vec3_generic(void);
> +void except_vec_ejtag_debug(void);
> +
> #endif /* _U_BOOT_MIPS_H_ */
> diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
> index 02607f7..659c6ad 100644
> --- a/arch/mips/lib/Makefile
> +++ b/arch/mips/lib/Makefile
> @@ -7,7 +7,9 @@
>
> obj-y += cache.o
> obj-y += cache_init.o
> +obj-y += genex.o
> obj-y += stack.o
> +obj-y += traps.o
>
> obj-$(CONFIG_CMD_BOOTM) += bootm.o
>
> diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S
> new file mode 100644
> index 0000000..f72545d
> --- /dev/null
> +++ b/arch/mips/lib/genex.S
> @@ -0,0 +1,214 @@
> +/*
> + * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
> + * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
> + * Copyright (C) 2002, 2007 Maciej W. Rozycki
> + * Copyright (C) 2001, 2012 MIPS Technologies, Inc. All rights reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <asm/asm.h>
> +#include <asm/regdef.h>
> +#include <asm/mipsregs.h>
> +#include <asm/asm-offsets.h>
> +
> + .set noreorder
> +
> + /*
> + * Macros copied and adapted from Linux MIPS
> + */
> + .macro SAVE_AT
> + .set push
> + .set noat
> + LONG_S $1, PT_R1(sp)
> + .set pop
> + .endm
> +
> + .macro RESTORE_AT
> + .set push
> + .set noat
> + LONG_L $1, PT_R1(sp)
> + .set pop
> + .endm
> +
> + .macro SAVE_TEMP
> + mfhi v1
> +#ifdef CONFIG_32BIT
> + LONG_S $8, PT_R8(sp)
> + LONG_S $9, PT_R9(sp)
> +#endif
> + LONG_S $10, PT_R10(sp)
> + LONG_S $11, PT_R11(sp)
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