[U-Boot] [PATCH 13/23] net: pch_gbe: Add cache maintenance

[Bin Meng]

On Tue, Sep 27, 2016 at 2:29 AM, Paul Burton <paul.burton at imgtec.com> wrote:
> On MIPS systems DMA isn't coherent with the CPU caches unless an IOCU is
> present. When there is no IOCU we need to writeback or invalidate the
> data caches at appropriate points. Perform this cache maintenance in
> the pch_gbe driver which is used on the MIPS Boston development board.
>
> Signed-off-by: Paul Burton <paul.burton at imgtec.com>
> ---
>
>  drivers/net/pch_gbe.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>

Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Tested on Crown Bay
Tested-by: Bin Meng <bmeng.cn at gmail.com>