[U-Boot] [PATCH v1 2/3] dts: rk3399-puma: add DTS for RK3399-Q7 (Puma) SoM

[Simon Glass]

On 28 March 2017 at 10:48, Philipp Tomsich
<philipp.tomsich at theobroma-systems.com> wrote:
> The RK3399-Q7 is a system-on-module featuring the Rockchip RK3399
> in a Qseven-compatible form-factor.
>
> These changes add a device-tree describing the board and its
> interfaces for basic functionality (e.g. GbE, SPI, eMMC, SD-card).
>
> This includes the following changes from the original development:
>
>  * dts: rk3399-puma: include DTS for RK3399-Q7 SoM in the Makefile
>  * dts: rk3399-puma: add gmac for the RK3399-Q7
>
> This change enables the Gigabit Ethernet support on the RK3399-Q7.
>
>  * dts: rk3399-puma: use serial0 for stdout
>  * dts: rk3399-puma: prepare the sdmmc node for SPL booting
>  * dts: rk3399-puma: enable spi1 and spi5, add /spi1/spiflash
>
> The RK3399-Q7 (Puma) unsually (this is a build-time option for
> customised boards) has an on-module SPI-flash connected to SPI1.
> As of today, this is a Winbond W25Q32DW (32MBit) device.
>
> The SPI5 controller is routed to the Q7 edge connector and provides
> general-purpose SPI connectivity for customer base-boards.
>
> With some minor improvements on integration into our outbound tree
>  - explicitly modelled the SPI flash as 'spiflash' under spi0
>    [dts: rk3399-puma: explicitly model spi-flash under spi1]
>  - renamed the aliases to spi0 and spi1 to allow easier use of
>    commands and legacy (SPL) infrastructure... i.e. the controllers
>    will be 0 and 1 for 'sf probe', 'sspi', etc.
>    [dts: rk3399-puma: rename aliases to number spi as 0 and 1 for commands]
>
>  * dts: rk3399-puma: include SPI in the spl-boot-order property
>
> Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> ---
>
>  arch/arm/dts/Makefile        |   3 +-
>  arch/arm/dts/rk3399-puma.dts | 189 +++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 191 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/rk3399-puma.dts

Acked-by: Simon Glass <sjg at chromium.org>