[U-Boot] [PATCH 1/3] net: fec: do not access reserved register for i.MX6ULL

[Peng Fan]

Hi Stefano,

> -----Original Message-----
> From: Stefano Babic [mailto:sbabic at denx.de]
> Sent: Thursday, April 13, 2017 12:22 AM
> To: Peng Fan <peng.fan at nxp.com>; joe.hershberger at ni.com
> Cc: u-boot at lists.denx.de
> Subject: Re: [U-Boot] [PATCH 1/3] net: fec: do not access reserved register for
> i.MX6ULL
> 
> On 10/04/2017 13:44, Peng Fan wrote:
> > The MIB RAM and FIFO receive start register does not exist on
> > i.MX6ULL. Accessing these register will cause enet not work well or
> > cause system report fault.
> >
> > Signed-off-by: Peng Fan <peng.fan at nxp.com>
> > Cc: Joe Hershberger <joe.hershberger at ni.com>
> > ---
> >  drivers/net/fec_mxc.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index
> > 910879b..ac7afb5 100644
> > --- a/drivers/net/fec_mxc.c
> > +++ b/drivers/net/fec_mxc.c
> > @@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
> >  	writel(0x00000000, &fec->eth->gaddr2);
> >
> >  	/* Do not access reserved register for i.MX6UL */
> > -	if (!is_mx6ul()) {
> > +	if (!is_mx6ul() && !is_mx6ull()) {
> >  		/* clear MIB RAM */
> >  		for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
> >  			writel(0, i);
> >
> 
> Reviewed-by : Stefano Babic <sbabic at denx.de>
> 
> Joe, I see Tom has assigned the series  to me. If it is ok for you, I will merge the
> series into u-boot-imx.

Will you pick up this patch set?

Thanks,
Peng.
> 
> Regards,
> Stefano
> 
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