[U-Boot] [PATCH v4 42/66] rockchip: clk: rk3368: define DMA1_SRST_REQ and DMA2_SRST_REQ

Philipp Tomsich philipp.tomsich at theobroma-systems.com
Wed Aug 2 20:34:37 UTC 2017

On he RK3368, we need to temporarily disable security on the DMA
engines during TPL and SPL to allow the MMC host to DMA into DRAM.  To
do so, we need to reset the two DMA engines, which in turn requires
the DMA1_SRST_REQ and DMA2_SRST_REQ constants to refer to the
appropriate bits in the CRU.

As the ATF correctly initialises security (and only leaves EL3 after
doing so), this can not pose a security issue.

Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>

Reviewed-by: Simon Glass <sjg at chromium.org>

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 24a9cc0..bf09e2f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -102,6 +102,10 @@ enum {
 	/* SOFTRST1_CON */
+	DMA1_SRST_REQ                   = BIT(2),
+	/* SOFTRST4_CON */
+	DMA2_SRST_REQ                   = BIT(0),
 	/* GLB_RST_CON */

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