[U-Boot] arm socfpga: Revert "spi: cadence_qspi_apb: Support 32 bit AHB address"

Frank Mori Hess fmh6jj at gmail.com
Mon Dec 4 17:01:14 UTC 2017


On Mon, Dec 4, 2017 at 11:41 AM, Vignesh R <vigneshr at ti.com> wrote:
> Hi,
>
> On 04-Dec-17 6:41 PM, Frank Mori Hess wrote:
>> Since your commit broke my platform to fix yours, shouldn't it be
>> reverted and TI platforms use your pending patch queue?
>>
>
> Socfpga DT defined ahb base as 0xffa00000 while masked upper bits in the
> code, which was confusing. And seems that my patch did work on some
> socfgpa board looking at the original commit message.

There is nothing in the original commit message that suggests it
worked on any socfpga board, unless you mean

"Since AHB address is passed from DT
   and read as u32 value, it anyway does not make sense to mask upper bits."

which is simply wrong.

> If the patch is reverted then, applying pending patches alone will not
> help because my patch would be needed anyway to make sure we don't mask
> 31-20 bits on TI platforms.

No it won't needed, see http://patchwork.ozlabs.org/patch/838592/ that
patch series writes plat->trigger_address instead of ahbbase (masked
or not).


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