[U-Boot] [GIT PULL] Xilinx fixes for v2018.01-rc2

[Tom Rini]

On Fri, Dec 15, 2017 at 03:33:44PM +0100, Michal Simek wrote:

> Hi Tom, +Stephen
> 
> please pull these changes to your tree. Travis is not showing any issue.
> https://travis-ci.org/michalsimek-test/u-boot/builds/316577925
> 
> Buildman was also fine over all patches and tests on board looks good too.
> 
> I have included one patch from Stephen which we discussed for fixing
> zynq_cse_qspi configuration which doesn't use HUSH.
> 
> Thanks,
> Michal
> 
> 
> The following changes since commit 659208da4703de50826a469cbb38bf6afb938978:
> 
>   README: update the kernel coding style reference (2017-12-12 21:34:10
> -0500)
> 
> are available in the git repository at:
> 
>   git://www.denx.de/git/u-boot-microblaze.git tags/xilinx-for-v2018.01-rc2
> 
> for you to fetch changes up to 956a1340c8677e96f9eb364fb0070c152d591a4a:
> 
>   test/py: Setup variables based on HUSH selection (2017-12-14 20:09:04
> +0100)
> 
> ----------------------------------------------------------------
> Xilinx changes for v2018.01-rc2
> 
> fpga:
> - Enable loading bitstream via fit image for !xilinx platforms
> 
> zynq:
> - Fix SPL SD boot mode
> 
> zynqmp:
> - Not not reset in panic
> - Do not use simple allocator because of fat changes
> - Various dt chagnes
> - modeboot variable setup
> - Fix fpga loading on automotive devices
> - Fix coverity issues
> 
> test:
> - Fix env test for !hush case - Stephen's patch

NAK.  The AES command adds warnings on many xilinx platforms.  Please
fix, thanks!

-- 
Tom
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