[U-Boot] [PATCH v2 52/63] x86: Move pirq_routing_table to global_data

Simon Glass sjg at chromium.org
Mon Feb 6 15:35:43 UTC 2017


Hi Bin,

On 3 February 2017 at 22:01, Bin Meng <bmeng.cn at gmail.com> wrote:
> Hi Simon,
>
> On Tue, Jan 17, 2017 at 12:34 PM, Bin Meng <bmeng.cn at gmail.com> wrote:
>> Hi Simon,
>>
>> On Mon, Jan 16, 2017 at 10:08 PM, Simon Glass <sjg at chromium.org> wrote:
>>> Hi Bin,
>>>
>>> On 14 January 2017 at 06:32, Bin Meng <bmeng.cn at gmail.com> wrote:
>>>> Hi Simon,
>>>>
>>>> On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass <sjg at chromium.org> wrote:
>>>>> To avoid using BSS in SPL before SDRAM is set up, move this field to
>>>>> global_data.
>>>>>
>>>>
>>>> Why is this needed? pirq routing table setup is done after SDRAM
>>>> initialization. Isn't SPL doing this with a different order?
>>>
>>> I'm not sure why it should. SPL sets up SDRAM so it should be able to
>>> set up interrupts, shouldn't it? Some device init may need interrupts,
>>> and my plan was to do all the 32-bit init in SPL.
>>
>> Yes, but I see interrupt_init() is called after dram_init() in
>> arch/x86/lib/spl.c, where BSS is already cleared after dram_init(). Am
>> I missing anything?
>
> Could you have a look at my comments?

I have not got back to this yet...

But if BSS is in ROM then we cannot use it. And I think that is the
case with SPL. We don't really know the RAM address so cannot set up
BSS to go somewhere else. Or at least it's tricky...

Regards,
Simon


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