[U-Boot] [PATCH 03/10] stm32f7: serial: use clock driver to enable clock

Simon Glass sjg at chromium.org
Fri Feb 10 16:22:16 UTC 2017


Hi Vikas,

On 4 February 2017 at 15:43, Vikas Manocha <vikas.manocha at st.com> wrote:
> Signed-off-by: Vikas Manocha <vikas.manocha at st.com>
> ---
>  drivers/serial/serial_stm32x7.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass <sjg at chromium.org>

Nits below

>
> diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c
> index 2e6c676..969d94c 100644
> --- a/drivers/serial/serial_stm32x7.c
> +++ b/drivers/serial/serial_stm32x7.c
> @@ -6,6 +6,7 @@
>   */
>
>  #include <common.h>
> +#include <clk.h>
>  #include <dm.h>
>  #include <asm/io.h>
>  #include <serial.h>
> @@ -76,8 +77,23 @@ static int stm32_serial_probe(struct udevice *dev)
>  {
>         struct stm32x7_serial_platdata *plat = dev->platdata;
>         struct stm32_usart *const usart = plat->base;
> -       setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);
>
> +#if CONFIG_IS_ENABLED(CLK)

Or #ifdef CONFIG_CLK

> +       int ret;
> +       struct clk clk;

blank line here

> +       ret = clk_get_by_index(dev, 0, &clk);
> +       if (ret < 0)
> +               return ret;
> +
> +       ret = clk_enable(&clk);
> +

drop blank line (since the statement below relates to this one.

> +       if (ret) {
> +               dev_err(dev, "failed to enable clock\n");
> +               return ret;
> +       }
> +#endif
> +
> +       setbits_le32(&usart->cr1, USART_CR1_RE | USART_CR1_TE | USART_CR1_UE);

blank line

>         return 0;
>  }
>
> --
> 1.9.1
>

Regards,
Simon


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