[U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007

[york sun]

On 02/03/2017 06:08 AM, Suresh Gupta wrote:
> Rx Compliance tests  may fail intermittently at high
> jitter frequencies using default register values
>
> Changes identified in test setup makes the Rx compliance test pass
>
> Signed-off-by: Sriram Dash <sriram.dash at nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
> Signed-off-by: Suresh Gupta <suresh.gupta at nxp.com>
> ---
> Changes in v2:
> 	Clean up the code after Scott comments,
> 	Previously in v1, we was defining the pointer as u32,
> 	then casting it to u8, and then passing it to
> 	a 16-bit accessor.
> Changes in v3:
> 	Change CONFIG_XXX to CONFIG_ARCH_XXX
>
>
>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig          |  6 ++++
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c            | 42 ++++++++++++++++++++++
>  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  9 +++++
>  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 +++++
>  4 files changed, 66 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index d5d6040..a27e310 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -25,6 +25,7 @@ config ARCH_LS1043A
>  	select SYS_FSL_ERRATUM_A009008
>  	select SYS_FSL_ERRATUM_A009798
>  	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>  	select SYS_FSL_HAS_DDR3
>  	select SYS_FSL_HAS_DDR4
>  	select ARCH_EARLY_INIT_R
> @@ -46,6 +47,7 @@ config ARCH_LS1046A
>  	select SYS_FSL_ERRATUM_A009008
>  	select SYS_FSL_ERRATUM_A009798
>  	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>  	select SYS_FSL_HAS_DDR4
>  	select SYS_FSL_SRDS_2
>  	select ARCH_EARLY_INIT_R
> @@ -77,6 +79,7 @@ config ARCH_LS2080A
>  	select SYS_FSL_ERRATUM_A009008
>  	select SYS_FSL_ERRATUM_A009798
>  	select SYS_FSL_ERRATUM_A008997
> +	select SYS_FSL_ERRATUM_A009007
>  	select ARCH_EARLY_INIT_R
>  	select BOARD_EARLY_INIT_F
>
> @@ -167,6 +170,9 @@ config SYS_FSL_ERRATUM_A009798
>  config SYS_FSL_ERRATUM_A008997
>  	bool "Workaround for USB PHY erratum A008997"
>
> +config SYS_FSL_ERRATUM_A009007
> +	bool "Workaround for USB PHY erratum A009007"
> +
>  config MAX_CPUS
>  	int "Maximum number of CPUs permitted for Layerscape"
>  	default 4 if ARCH_LS1043A
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index c56cb72..9aab8a7 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -120,6 +120,46 @@ static void erratum_a008997(void)
>  #endif
>  #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
>  }
> +static void erratum_a009007(void)
> +{
> +/* TODO:implement the out_be16 instead of writew which is taking
> +little endian style */

Did you mean to remind yourself to finish this before sending this 
patch? You know we already have out_be16(), don't you?

York