[U-Boot] [PATCH 1/3] DRA7XX: HW_DATA: Provide dpll_params definitions for PCIe DPLL

Roger Quadros rogerq at ti.com
Mon Jan 16 17:25:02 CET 2017


+Kishon

On 16/01/17 00:39, Lukasz Majewski wrote:
> With this code only 19.2 HMz SYSCLK (input) frequency is supported on
> dra7xx based SoCs.
> 
> Signed-off-by: Lukasz Majewski <lukma at denx.de>
> ---
>  arch/arm/cpu/armv7/omap5/hw_data.c | 12 ++++++++++++
>  arch/arm/include/asm/omap_common.h |  1 +
>  2 files changed, 13 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
> index 2192090..e16bd2c 100644
> --- a/arch/arm/cpu/armv7/omap5/hw_data.c
> +++ b/arch/arm/cpu/armv7/omap5/hw_data.c
> @@ -257,6 +257,17 @@ static const struct dpll_params gmac_dpll_params_2000mhz[NUM_SYS_CLKS] = {
>  	{625, 23, 4, 10, 40, 8, 10, -1, -1, -1, -1, -1},	/* 38.4 MHz */
>  };
>  
> +static const struct dpll_params pcie_dpll_params_1500mhz[NUM_SYS_CLKS] = {
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 12 MHz   */
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 20 MHz   */
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 16.8 MHz */
> +	{625, 7, 15, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 19.2 MHz */
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 26 MHz   */
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 27 MHz   */
> +	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 38.4 MHz */
> +};
> +
> +
>  struct dplls omap5_dplls_es1 = {
>  	.mpu = mpu_dpll_params_800mhz,
>  	.core = core_dpll_params_2128mhz_ddr532,
> @@ -294,6 +305,7 @@ struct dplls dra7xx_dplls = {
>  	.usb = usb_dpll_params_1920mhz,
>  	.ddr = ddr_dpll_params_2128mhz,
>  	.gmac = gmac_dpll_params_2000mhz,
> +	.pcie = pcie_dpll_params_1500mhz,
>  };
>  
>  struct dplls dra72x_dplls = {
> diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
> index 605c549..cc40ee9 100644
> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -526,6 +526,7 @@ struct dplls {
>  	const struct dpll_params *usb;
>  	const struct dpll_params *ddr;
>  	const struct dpll_params *gmac;
> +	const struct dpll_params *pcie;
>  };
>  
>  struct pmic_data {
> 


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