[U-Boot] [PATCH] armv8/fsl-lsch2: correct the config description of DSPI clock divider

[Zhiqiang Hou]

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index d8b285d..8c41fd7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -305,7 +305,7 @@ config SYS_FSL_DSPI_CLK_DIV
 	default 2
 	help
 	  This is the divider that is used to derive DSPI clock from Platform
-	  PLL, in another word DSPI_clk = Platform_PLL_freq / this_divider.
+	  clock, in another word DSPI_clk = Platform_clk / this_divider.
 
 config SYS_FSL_DUART_CLK_DIV
 	int "DUART clock divider"
-- 
2.1.0.27.g96db324