[U-Boot] [U-Boot,06/13] rockchip: rk3066: add core support
Philipp Tomsich
philipp.tomsich at theobroma-systems.com
Tue Jul 4 17:35:50 UTC 2017
On Tue, 6 Jun 2017, Paweł Jarosz wrote:
> Add core skeleton for rk3066
>
> Signed-off-by: Paweł Jarosz <paweljarosz3691 at gmail.com>
> Acked-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
> ---
> arch/arm/mach-rockchip/Kconfig | 16 +++
> arch/arm/mach-rockchip/Makefile | 4 +
> arch/arm/mach-rockchip/rk3066-board-spl.c | 173 +++++++++++++++++++++++++
> arch/arm/mach-rockchip/rk3066-board-tpl.c | 46 +++++++
> arch/arm/mach-rockchip/rk3066-board.c | 180 ++++++++++++++++++++++++++
> arch/arm/mach-rockchip/rk3066/Kconfig | 34 +++++
> arch/arm/mach-rockchip/rk3066/Makefile | 12 ++
> arch/arm/mach-rockchip/rk3066/clk_rk3066.c | 33 +++++
> arch/arm/mach-rockchip/rk3066/syscon_rk3066.c | 54 ++++++++
> include/configs/rk3066_common.h | 125 ++++++++++++++++++
> 10 files changed, 677 insertions(+)
> create mode 100644 arch/arm/mach-rockchip/rk3066-board-spl.c
> create mode 100644 arch/arm/mach-rockchip/rk3066-board-tpl.c
> create mode 100644 arch/arm/mach-rockchip/rk3066-board.c
> create mode 100644 arch/arm/mach-rockchip/rk3066/Kconfig
> create mode 100644 arch/arm/mach-rockchip/rk3066/Makefile
> create mode 100644 arch/arm/mach-rockchip/rk3066/clk_rk3066.c
> create mode 100644 arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
> create mode 100644 include/configs/rk3066_common.h
>
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 6be2ab5..ad35e0a 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -11,6 +11,21 @@ config ROCKCHIP_RK3036
> and video codec support. Peripherals include Gigabit Ethernet,
> USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
>
> +config ROCKCHIP_RK3066
> + bool "Support Rockchip RK3066"
> + select CPU_V7
> + select SUPPORT_SPL
> + select SUPPORT_TPL
> + select SPL
> + select TPL
> + select BOARD_LATE_INIT
> + select ROCKCHIP_BROM_HELPER
> + help
> + The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A7
> + including NEON and GPU, Mali-400 graphics, several DDR3 options
> + and video codec support. Peripherals include Gigabit Ethernet,
> + USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
> +
> config ROCKCHIP_RK3188
> bool "Support Rockchip RK3188"
> select CPU_V7
> @@ -91,6 +106,7 @@ config SPL_MMC_SUPPORT
> default y if !ROCKCHIP_SPL_BACK_TO_BROM
>
> source "arch/arm/mach-rockchip/rk3036/Kconfig"
> +source "arch/arm/mach-rockchip/rk3066/Kconfig"
> source "arch/arm/mach-rockchip/rk3188/Kconfig"
> source "arch/arm/mach-rockchip/rk3288/Kconfig"
> source "arch/arm/mach-rockchip/rk3328/Kconfig"
> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
> index 327b267..1ebba0c 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -7,15 +7,18 @@
> obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
>
> ifdef CONFIG_TPL_BUILD
> +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
> obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
> obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
> else ifdef CONFIG_SPL_BUILD
> obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
> +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
> obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
> obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
> obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o
> obj-$(CONFIG_ROCKCHIP_BROM_HELPER) += save_boot_param.o
> else
> +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
> obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
> obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
> obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o
> @@ -29,6 +32,7 @@ ifndef CONFIG_TPL_BUILD
> obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
> endif
>
> +obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
> obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
> obj-$(CONFIG_ROCKCHIP_RK3328) += rk3328/
> obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
> diff --git a/arch/arm/mach-rockchip/rk3066-board-spl.c b/arch/arm/mach-rockchip/rk3066-board-spl.c
> new file mode 100644
> index 0000000..6f7bfb0
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066-board-spl.c
> @@ -0,0 +1,173 @@
> +/*
> + * (C) Copyright 2015 Google, Inc
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <clk.h>
> +#include <common.h>
> +#include <debug_uart.h>
> +#include <dm.h>
> +#include <fdtdec.h>
> +#include <led.h>
> +#include <malloc.h>
> +#include <ram.h>
> +#include <spl.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <asm/arch/bootrom.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/periph.h>
> +#include <asm/arch/pmu_rk3188.h>
> +#include <asm/arch/sdram.h>
> +#include <asm/arch/timer.h>
> +#include <dm/pinctrl.h>
> +#include <dm/root.h>
> +#include <dm/test.h>
> +#include <dm/util.h>
> +#include <power/regulator.h>
> +#include <syscon.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +u32 spl_boot_device(void)
> +{
> +#if !CONFIG_IS_ENABLED(OF_PLATDATA)
> + const void *blob = gd->fdt_blob;
> + struct udevice *dev;
> + const char *bootdev;
> + int node;
> + int ret;
> +
> + bootdev = fdtdec_get_config_string(blob, "u-boot,boot0");
> + debug("Boot device %s\n", bootdev);
> + if (!bootdev)
> + goto fallback;
> +
> + node = fdt_path_offset(blob, bootdev);
> + if (node < 0) {
> + debug("node=%d\n", node);
> + goto fallback;
> + }
> + ret = device_get_global_by_of_offset(node, &dev);
> + if (ret) {
> + debug("device at node %s/%d not found: %d\n", bootdev, node,
> + ret);
> + goto fallback;
> + }
> + debug("Found device %s\n", dev->name);
> + switch (device_get_uclass_id(dev)) {
> + case UCLASS_SPI_FLASH:
> + return BOOT_DEVICE_SPI;
> + case UCLASS_MMC:
> + return BOOT_DEVICE_MMC1;
> + default:
> + debug("Booting from device uclass '%s' not supported\n",
> + dev_get_uclass_name(dev));
> + }
> +
> +fallback:
> +#endif
> + return BOOT_DEVICE_MMC1;
> +}
> +
> +u32 spl_boot_mode(const u32 boot_device)
> +{
> + return MMCSD_MODE_FS;
> +}
> +
> +static int setup_arm_clock(void)
> +{
> + struct udevice *dev;
> + struct clk clk;
> + int ret;
> +
> + ret = rockchip_get_clk(&dev);
> + if (ret)
> + return ret;
> +
> + clk.id = CLK_ARM;
> + ret = clk_request(dev, &clk);
> + if (ret < 0)
> + return ret;
> +
> + ret = clk_set_rate(&clk, 600000000);
> +
> + clk_free(&clk);
> + return ret;
> +}
> +
> +void board_init_f(ulong dummy)
> +{
> + struct udevice *pinctrl, *dev;
> + int ret;
> +
> + debug_uart_init();
> +
> + ret = spl_early_init();
> + if (ret) {
> + debug("spl_early_init() failed: %d\n", ret);
> + hang();
> + }
> +
> + /* Enable Timer0 */
> + rk_clrsetreg(CONFIG_SYS_TIMER_BASE + 0x8, 0x1, 0x1);
> +
> + ret = rockchip_get_clk(&dev);
> + if (ret) {
> + debug("CLK init failed: %d\n", ret);
> + return;
> + }
> +
> + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
> + if (ret) {
> + debug("Pinctrl init failed: %d\n", ret);
> + return;
> + }
> +
> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> + if (ret) {
> + debug("DRAM init failed: %d\n", ret);
> + return;
> + }
> +
> + setup_arm_clock();
> +}
> +
> +void spl_board_init(void)
> +{
> + struct udevice *pinctrl;
> + int ret;
> +
> + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
> + if (ret) {
> + debug("%s: Cannot find pinctrl device\n", __func__);
> + goto err;
> + }
> +
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
> + if (ret) {
> + debug("%s: Failed to set up SD card\n", __func__);
> + goto err;
> + }
> +#endif
> +
> + /* Enable debug UART */
> + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
> + if (ret) {
> + debug("%s: Failed to set up console UART\n", __func__);
> + goto err;
> + }
> +
> + preloader_console_init();
> +
> + return;
> +
> +err:
> + printf("spl_board_init: Error %d\n", ret);
> +
> + /* No way to report error here */
> + hang();
> +}
> diff --git a/arch/arm/mach-rockchip/rk3066-board-tpl.c b/arch/arm/mach-rockchip/rk3066-board-tpl.c
> new file mode 100644
> index 0000000..d517a33
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066-board-tpl.c
> @@ -0,0 +1,46 @@
> +/*
> + * (C) Copyright 2015 Google, Inc
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <debug_uart.h>
> +#include <spl.h>
> +#include <asm/io.h>
> +#include <asm/arch/bootrom.h>
> +#include <asm/arch/ddr_rk3188.h>
> +#include <asm/arch/grf_rk3066.h>
> +#include <asm/arch/pmu_rk3188.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define RK3066_TIMER_CONTROL 0x8
> +#define GRF_BASE 0x20008000
> +
> +void board_init_f(ulong dummy)
> +{
> + /* Enable early UART on the RK3066 */
> +
> + struct rk3066_grf * const grf = (void *)GRF_BASE;
> +
> + rk_clrsetreg(&grf->gpio1b_iomux,
> + GPIO1B1_MASK << GPIO1B1_SHIFT |
> + GPIO1B0_MASK << GPIO1B0_SHIFT,
> + GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
> + GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
> +
> + debug_uart_init();
> +
> + printch('T');
> + printch('P');
> + printch('L');
> + printch('\n');
Can you make this printascii("TPL\n")?
> +
> + /* Enable Timer0 */
> + rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
> +
> + sdram_initialise();
> +
> + back_to_bootrom();
> +}
> diff --git a/arch/arm/mach-rockchip/rk3066-board.c b/arch/arm/mach-rockchip/rk3066-board.c
> new file mode 100644
> index 0000000..3d92253
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066-board.c
> @@ -0,0 +1,180 @@
> +/*
> + * (C) Copyright 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <clk.h>
> +#include <dm.h>
> +#include <ram.h>
> +#include <syscon.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/grf_rk3066.h>
> +#include <asm/arch/periph.h>
> +#include <asm/arch/pmu_rk3188.h>
> +#include <asm/arch/boot_mode.h>
> +#include <asm/gpio.h>
> +#include <dm/pinctrl.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_late_init(void)
> +{
> + struct rk3066_grf *grf;
> +
> + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> + if (IS_ERR(grf)) {
> + error("grf syscon returned %ld\n", PTR_ERR(grf));
> + } else {
> + /* enable noc remap to mimic legacy loaders */
> + rk_clrsetreg(&grf->soc_con0,
> + NOC_REMAP_MASK << NOC_REMAP_SHIFT,
> + NOC_REMAP_MASK << NOC_REMAP_SHIFT);
> + }
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> +#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
> + struct udevice *pinctrl;
> + int ret;
> +
> + /*
> + * We need to implement sdcard iomux here for the further
> + * initialization, otherwise, it'll hit sdcard command sending
> + * timeout exception.
> + */
> + ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
> + if (ret) {
> + debug("%s: Cannot find pinctrl device\n", __func__);
> + goto err;
> + }
> + ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
> + if (ret) {
> + debug("%s: Failed to set up SD card\n", __func__);
> + goto err;
> + }
> +
> + return 0;
> +err:
> + printf("board_init: Error %d\n", ret);
> +
> + /* No way to report error here */
> + hang();
> +
> + return -1;
> +#else
> + return 0;
> +#endif
> +}
> +
> +int dram_init(void)
> +{
> + struct ram_info ram;
> + struct udevice *dev;
> + int ret;
> +
> + ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> + if (ret) {
> + debug("DRAM init failed: %d\n", ret);
> + return ret;
> + }
> + ret = ram_get_info(dev, &ram);
> + if (ret) {
> + debug("Cannot get DRAM size: %d\n", ret);
> + return ret;
> + }
> + debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
> + gd->ram_size = ram.size;
> +
> + return 0;
> +}
> +
> +#ifndef CONFIG_SYS_DCACHE_OFF
> +void enable_caches(void)
> +{
> + /* Enable D-cache. I-cache is already enabled in start.S */
> + dcache_enable();
> +}
> +#endif
> +
> +int print_cpuinfo (void)
> +{
> + printf("CPU: Rockchip RK3066\n");
> + return 0;
> +}
This should be implemented in a way that we can share this across all
the Rockchip boards.
> +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
> +#include <usb.h>
> +#include <usb/dwc2_udc.h>
> +
> +static struct dwc2_plat_otg_data rk3066_otg_data = {
> + .rx_fifo_sz = 275,
> + .np_tx_fifo_sz = 16,
> + .tx_fifo_sz = 256,
> +};
> +
> +int board_usb_init(int index, enum usb_init_type init)
> +{
> + int node, phy_node;
> + const char *mode;
> + bool matched = false;
> + const void *blob = gd->fdt_blob;
> + u32 grf_phy_offset;
> +
> + /* find the usb_otg node */
> + node = fdt_node_offset_by_compatible(blob, -1,
> + "rockchip,rk3066-usb");
> +
> + while (node > 0) {
> + mode = fdt_getprop(blob, node, "dr_mode", NULL);
> + if (mode && strcmp(mode, "otg") == 0) {
> + matched = true;
> + break;
> + }
> +
> + node = fdt_node_offset_by_compatible(blob, node,
> + "rockchip,rk3066-usb");
> + }
> + if (!matched) {
> + debug("Not found usb_otg device\n");
> + return -ENODEV;
> + }
> + rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
> +
> + node = fdtdec_lookup_phandle(blob, node, "phys");
> + if (node <= 0) {
> + debug("Not found usb phy device\n");
> + return -ENODEV;
> + }
> +
> + phy_node = fdt_parent_offset(blob, node);
> + if (phy_node <= 0) {
> + debug("Not found usb phy device\n");
> + return -ENODEV;
> + }
> +
> + rk3066_otg_data.phy_of_node = phy_node;
> + grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
> +
> + node = fdt_node_offset_by_compatible(blob, -1,
> + "rockchip,rk3066-grf");
> + if (node <= 0) {
> + debug("Not found grf device\n");
> + return -ENODEV;
> + }
> + rk3066_otg_data.regs_phy = grf_phy_offset +
> + fdtdec_get_addr(blob, node, "reg");
> +
> + return dwc2_udc_probe(&rk3066_otg_data);
> +}
This looks a lot like what we have in board/rockchip/evb_rk3328/evb-rk3328.c
(and possibly other places?). Can we deduplicate this for the various
boards/devices using the DWC2?
> +int board_usb_cleanup(int index, enum usb_init_type init)
> +{
> + return 0;
> +}
> +#endif
> diff --git a/arch/arm/mach-rockchip/rk3066/Kconfig b/arch/arm/mach-rockchip/rk3066/Kconfig
> new file mode 100644
> index 0000000..27d32fd
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066/Kconfig
> @@ -0,0 +1,34 @@
> +if ROCKCHIP_RK3066
> +
> +config TARGET_MK808_RK3066
> + bool "MK808_RK3066"
> + help
> + MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.
> +
> +config SYS_SOC
> + default "rockchip"
> +
> +config SYS_MALLOC_F_LEN
> + default 0x0800
> +
> +config SPL_LIBCOMMON_SUPPORT
> + default y
> +
> +config SPL_LIBGENERIC_SUPPORT
> + default y
> +
> +config SPL_SERIAL_SUPPORT
> + default y
> +
> +config TPL_LIBCOMMON_SUPPORT
> + default y
> +
> +config TPL_LIBGENERIC_SUPPORT
> + default y
> +
> +config TPL_SERIAL_SUPPORT
> + default y
> +
> +source "board/rikomagic/mk808_rk3066/Kconfig"
> +
> +endif
> diff --git a/arch/arm/mach-rockchip/rk3066/Makefile b/arch/arm/mach-rockchip/rk3066/Makefile
> new file mode 100644
> index 0000000..4cf5df2
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066/Makefile
> @@ -0,0 +1,12 @@
> +#
> +# Copyright (c) 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +ifndef CONFIG_TPL_BUILD
> +obj-y += clk_rk3066.o
> +obj-y += syscon_rk3066.o
> +else
> +obj-y += sdram_init.o
> +endif
> diff --git a/arch/arm/mach-rockchip/rk3066/clk_rk3066.c b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
> new file mode 100644
> index 0000000..ae52902
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066/clk_rk3066.c
> @@ -0,0 +1,33 @@
> +/*
> + * Copyright (C) 2016 Google, Inc
> + * Written by Simon Glass <sjg at chromium.org>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <syscon.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/cru_rk3066.h>
> +
> +int rockchip_get_clk(struct udevice **devp)
> +{
> + return uclass_get_device_by_driver(UCLASS_CLK,
> + DM_GET_DRIVER(rockchip_rk3066a_cru), devp);
> +}
> +
> +void *rockchip_get_cru(void)
> +{
> + struct rk3066_clk_priv *priv;
> + struct udevice *dev;
> + int ret;
> +
> + ret = rockchip_get_clk(&dev);
> + if (ret)
> + return ERR_PTR(ret);
> +
> + priv = dev_get_priv(dev);
> +
> + return priv->cru;
> +}
> diff --git a/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
> new file mode 100644
> index 0000000..57b2376
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rk3066/syscon_rk3066.c
> @@ -0,0 +1,54 @@
> +/*
> + * (C) Copyright 2015 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <syscon.h>
> +#include <asm/arch/clock.h>
> +
> +static const struct udevice_id rk3066_syscon_ids[] = {
> + { .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
> + { .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
> + { .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
> + { }
> +};
> +
> +U_BOOT_DRIVER(syscon_rk3066) = {
> + .name = "rk3066_syscon",
> + .id = UCLASS_SYSCON,
> + .of_match = rk3066_syscon_ids,
> +};
> +
> +#if CONFIG_IS_ENABLED(OF_PLATDATA)
> +static int rk3066_syscon_bind_of_platdata(struct udevice *dev)
> +{
> + dev->driver_data = dev->driver->of_match->data;
> + debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
> +
> + return 0;
> +}
> +
> +U_BOOT_DRIVER(rockchip_rk3188_noc) = {
> + .name = "rockchip_rk3188_noc",
> + .id = UCLASS_SYSCON,
> + .of_match = rk3066_syscon_ids,
> + .bind = rk3066_syscon_bind_of_platdata,
> +};
> +
> +U_BOOT_DRIVER(rockchip_rk3066_grf) = {
> + .name = "rockchip_rk3066_grf",
> + .id = UCLASS_SYSCON,
> + .of_match = rk3066_syscon_ids + 1,
> + .bind = rk3066_syscon_bind_of_platdata,
> +};
> +
> +U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
> + .name = "rockchip_rk3066_pmu",
> + .id = UCLASS_SYSCON,
> + .of_match = rk3066_syscon_ids + 2,
> + .bind = rk3066_syscon_bind_of_platdata,
> +};
> +#endif
> diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h
> new file mode 100644
> index 0000000..7009616
> --- /dev/null
> +++ b/include/configs/rk3066_common.h
> @@ -0,0 +1,125 @@
> +/*
> + * Copyright (c) 2017 Paweł Jarosz <paweljarosz3691 at gmail.com>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_RK3066_COMMON_H
> +#define __CONFIG_RK3066_COMMON_H
> +
> +#include <asm/arch/hardware.h>
> +#include "rockchip-common.h"
> +
> +#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
> +#define CONFIG_ENV_IS_NOWHERE
> +#define CONFIG_ENV_SIZE 0x2000
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_MALLOC_LEN (64 << 20)
> +#define CONFIG_SYS_CBSIZE 256
> +
> +#define CONFIG_SYS_TIMER_RATE 24000000
> +#define CONFIG_SYS_TIMER_BASE 0x20038000
> +#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 4)
> +#define CONFIG_SYS_TIMER_COUNTS_DOWN
> +
> +#define CONFIG_SPL_BOARD_INIT
> +
> +#define CONFIG_SYS_TEXT_BASE 0x60408000
> +
> +#define CONFIG_SYS_INIT_SP_ADDR 0x78000000
> +#define CONFIG_SYS_LOAD_ADDR 0x70800800
> +
> +#ifdef CONFIG_TPL_BUILD
> +#define CONFIG_SPL_TEXT_BASE 0x10080C04
> +#define CONFIG_SPL_STACK 0x1008FFFF
> +/* tpl size max 32kb - 4byte RK30 header */
> +#define CONFIG_SPL_MAX_SIZE (0x8000 - 0x4)
> +#elif defined(CONFIG_SPL_BUILD)
> +/* spl size max 200k */
> +#define CONFIG_SPL_MAX_SIZE 0x32000
> +#define CONFIG_SPL_TEXT_BASE 0x60000000
> +#define CONFIG_SPL_STACK 0x1008FFFF
> +#define CONFIG_SPL_STACK_R_ADDR 0x70000000
> +#define CONFIG_SPL_STACK_R 1
> +#define CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN 0x200000
> +#define CONFIG_SPL_OF_CONTROL 1
> +#define CONFIG_SPL_OF_PLATDATA 1
> +#define CONFIG_SPL_FRAMEWORK 1
> +#define CONFIG_SPL_CLK 1
> +#define CONFIG_SPL_PINCTRL 1
> +#define CONFIG_SPL_REGMAP 1
> +#define CONFIG_SPL_SYSCON 1
> +#define CONFIG_SPL_RAM 1
> +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT 1
> +#define CONFIG_SPL_MMC_SUPPORT 1
> +#define CONFIG_ROCKCHIP_SERIAL 1
> +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.bin"
> +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
> +#define CONFIG_SPL_LIBDISK_SUPPORT 1
> +#define CONFIG_SPL_EXT_SUPPORT 1
> +#define CONFIG_SPL_FAT_SUPPORT 1
> +#define CONFIG_SPL_DM 1
> +#define CONFIG_SPL_GPIO_SUPPORT 1
> +#define CONFIG_SPL_POWER_SUPPORT 1
Most of these should be in defconfig.
Please don't add any configurations via #define that can also go through
defconfig.
> +#endif
> +
> +#define CONFIG_SYS_NS16550_MEM32
> +
> +#define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x10000 - 0xC00)
> +#define CONFIG_ROCKCHIP_CHIP_TAG "RK30"
Why do we have this ROCKCHIP_CHIP_TAG? I can't find any use of it across
our entire code-base.
> +/* MMC/SD IP block */
> +#define CONFIG_BOUNCE_BUFFER
> +
> +#define CONFIG_CMD_CACHE
> +
> +#define CONFIG_SYS_SDRAM_BASE 0x60000000
> +#define CONFIG_NR_DRAM_BANKS 1
> +#define SDRAM_BANK_SIZE (1024UL << 20UL)
> +
> +#ifndef CONFIG_SPL_BUILD
> +/* usb */
> +#define CONFIG_USB
> +#define CONFIG_DM_USB
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_CMD_USB
> +#define CONFIG_USB_DWC2
Most of these should be in defconfig.
> +#define CONFIG_USB_GADGET
> +#define CONFIG_USB_GADGET_DUALSPEED
> +#define CONFIG_USB_GADGET_DWC2_OTG
> +#define CONFIG_ROCKCHIP_USB2_PHY
> +#define CONFIG_USB_GADGET_VBUS_DRAW 0
> +
> +#define CONFIG_USB_FUNCTION_MASS_STORAGE
> +#define CONFIG_CMD_USB_MASS_STORAGE
> +
> +#define CONFIG_USB_GADGET_DOWNLOAD
> +#define CONFIG_G_DNL_MANUFACTURER "Rockchip"
> +#define CONFIG_G_DNL_VENDOR_NUM 0x2207
> +#define CONFIG_G_DNL_PRODUCT_NUM 0x300a
Again: these should be in *_defconfig and not in the header-file.
Please check your entire header to make sure we don't add any definitions
here that could go through defconfig.
> +#define ENV_MEM_LAYOUT_SETTINGS \
> + "scriptaddr=0x60000000\0" \
> + "pxefile_addr_r=0x60100000\0" \
> + "fdt_addr_r=0x61f00000\0" \
> + "kernel_addr_r=0x62000000\0" \
> + "ramdisk_addr_r=0x64000000\0"
> +
> +#include <config_distro_bootcmd.h>
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "fdt_high=0x6fffffff\0" \
> + "initrd_high=0x6fffffff\0" \
> + "partitions=" PARTS_DEFAULT \
> + ENV_MEM_LAYOUT_SETTINGS \
> + ROCKCHIP_DEVICE_SETTINGS \
> + BOOTENV
> +
> +#include <config_distro_defaults.h>
> +#endif
> +
> +#define CONFIG_PREBOOT
> +
> +#endif
>
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