[U-Boot] [PATCH v2 4/9] microblaze: spl and normal u-boot stage set SYS_MALLOC_F indepently

[Andy Yan]

Some platforms has very small sram to run spl code, so
it may have no enough sapce for so much malloc pool before
relocation in spl stage as the normal u-boot stage.

Signed-off-by: Andy Yan <andy.yan at rock-chips.com>
---

Changes in v2: None

 arch/microblaze/cpu/start.S | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 79dc0cf..bfc0f54 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -11,6 +11,11 @@
 #include <asm-offsets.h>
 #include <config.h>
 
+#if defined(CONFIG_SPL_BUILD)
+#define MALLOC_F_LEN   CONFIG_SPL_SYS_MALLOC_F_LEN
+#else
+#define MALLOC_F_LEN   CONFIG_SYS_MALLOC_F_LEN
+#endif
 	.text
 	.global _start
 _start:
@@ -32,7 +37,7 @@ _start:
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 #else
 #if defined(CONFIG_SYS_MALLOC_F_LEN)
-	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
+	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET - MALLOC_F_LEN
 #else
 	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET
 #endif
@@ -162,14 +167,14 @@ clear_bss:
 #ifndef CONFIG_SPL_BUILD
 	or	r5, r0, r0	/* flags - empty */
 	addi    r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if defined(CONFIG_SYS_MALLOC_F)
 	addi	r6, r0, CONFIG_SYS_INIT_SP_OFFSET
 	swi	r6, r31, GD_MALLOC_BASE
 #endif
 	brai	board_init_f
 #else
 	addi	r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if defined(CONFIG_SYS_MALLOC_F)
 	addi	r6, r0, CONFIG_SPL_STACK_ADDR
 	swi	r6, r31, GD_MALLOC_BASE
 #endif
-- 
2.7.4