[U-Boot] [PATCH 48/51] ihs_mdio: Make DM-compatible

Mario Six mario.six at gdsys.cc
Fri Jul 14 12:55:34 UTC 2017


Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.

Signed-off-by: Mario Six <mario.six at gdsys.cc>
---

 board/gdsys/common/ihs_mdio.c | 49 ++++++++++++++++++++++++++++++++++++++-----
 board/gdsys/common/ihs_mdio.h |  5 +++++
 2 files changed, 49 insertions(+), 5 deletions(-)

diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 4e3bcd406f..4609e9f8c2 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -5,15 +5,25 @@
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
 #include <common.h>
 
-#include <gdsys_fpga.h>
 #include <miiphy.h>
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+#include <gdsys_fpga.h>
+#else
+#include <ihs_fpga.h>
+#endif
 
 #include "ihs_mdio.h"
 
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+enum {
+	REG_MDIO_CONTROL = 0x0,
+	REG_MDIO_ADDR_DATA = 0x2,
+	REG_MDIO_RX_DATA = 0x4,
+};
+#endif
+
 static int ihs_mdio_idle(struct mii_dev *bus)
 {
 	struct ihs_mdio_info *info = bus->priv;
@@ -21,7 +31,11 @@ static int ihs_mdio_idle(struct mii_dev *bus)
 	unsigned int ctr = 0;
 
 	do {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 		FPGA_GET_REG(info->fpga, mdio.control, &val);
+#else
+		val = fpga_in_le16(info->fpga, info->base + REG_MDIO_CONTROL);
+#endif
 		udelay(100);
 		if (ctr++ > 10)
 			return -1;
@@ -40,9 +54,17 @@ static int ihs_mdio_reset(struct mii_dev *bus)
 static int ihs_mdio_address(struct ihs_mdio_info *info, int addr, int dev_addr,
 			    int regnum)
 {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 	FPGA_SET_REG(info->fpga, mdio.address_data, regnum);
 	FPGA_SET_REG(info->fpga, mdio.control,
 		     ((addr & 0x1f) << 5) | (dev_addr & 0x1f) | (0 << 10));
+#else
+	fpga_out_le16(info->fpga, info->base + REG_MDIO_ADDR_DATA, regnum);
+	fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+		      ((addr & 0x1f) << 5) |
+		       (dev_addr & 0x1f) |
+		       (0 << 10));
+#endif
 
 	return 0;
 }
@@ -60,15 +82,26 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr,
 		ihs_mdio_idle(bus);
 	}
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 	FPGA_SET_REG(info->fpga, mdio.control,
 		     ((addr & 0x1f) << 5) |
 		      ((info->clause45 ? dev_addr : regnum) & 0x1f) |
 		      (2 << 10));
+#else
+	fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+		      ((addr & 0x1f) << 5) |
+		       ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+		       (2 << 10));
+#endif
 
 	/* wait for rx data available */
 	udelay(100);
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 	FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
+#else
+	val = fpga_in_le16(info->fpga, info->base + REG_MDIO_RX_DATA);
+#endif
 
 	return val;
 }
@@ -85,11 +118,19 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, int dev_addr,
 		ihs_mdio_idle(bus);
 	}
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 	FPGA_SET_REG(info->fpga, mdio.address_data, value);
 	FPGA_SET_REG(info->fpga, mdio.control,
 		     ((addr & 0x1f) << 5) |
 		      ((info->clause45 ? dev_addr : regnum) & 0x1f) |
 		      (1 << 10));
+#else
+	fpga_out_le16(info->fpga, info->base + REG_MDIO_ADDR_DATA, value);
+	fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+		      ((addr & 0x1f) << 5) |
+		       ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+		       (1 << 10));
+#endif
 
 	return 0;
 }
@@ -112,5 +153,3 @@ int ihs_mdio_init(struct ihs_mdio_info *info)
 
 	return mdio_register(bus);
 }
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/ihs_mdio.h b/board/gdsys/common/ihs_mdio.h
index 372f07569c..e787dc1642 100644
--- a/board/gdsys/common/ihs_mdio.h
+++ b/board/gdsys/common/ihs_mdio.h
@@ -9,7 +9,12 @@
 #define _IHS_MDIO_H_
 
 struct ihs_mdio_info {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 	u32 fpga;
+#else
+	struct udevice *fpga;
+	int base;
+#endif
 	char *name;
 	bool clause45;
 };
-- 
2.11.0



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