[U-Boot] [PATCH 0/5] x86: bootstage: Fix bootstage operation on link

[Simon Glass]

Recent bootstage changes have provoked problems with chromebook_link.
Bootstage uses the timer before driver model is ready, but link uses
driver model for the timer.

This series:
- Updates the TSC timer to make the bootstage work before DM is ready
- Provides a way to have a separate setting for record count in SPL to
    save memory
- Tidies up a few bootstage options that are no-longer needed

This fixes booting on link which is currently broken.


Simon Glass (5):
  board_f: Drop the timer after relocation
  dm: x86: Allow TSC timer to be used before DM is ready
  dm: x86: Update timer_get_boot_us to work before DM is ready
  bootstage: Drop unused options
  bootstage: Provide a separate record count setting for SPL

 arch/x86/include/asm/global_data.h |  1 +
 common/Kconfig                     | 16 +++++++---------
 common/board_f.c                   |  1 +
 common/bootstage.c                 |  6 +++---
 configs/sandbox_defconfig          |  1 -
 configs/sandbox_flattree_defconfig |  1 -
 configs/sandbox_noblk_defconfig    |  1 -
 configs/sandbox_spl_defconfig      |  1 -
 drivers/timer/tsc_timer.c          | 38 ++++++++++++++++++++++++++++----------
 include/bootstage.h                |  6 ------
 10 files changed, 40 insertions(+), 32 deletions(-)

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2.13.2.932.g7449e964c-goog