[U-Boot] [PATCH v3 04/10] microblaze: spl and normal u-boot stage set SYS_MALLOC_F_LEN indepently

[Andy Yan]

Some platforms has very small sram to run spl code, so
it may have no enough sapce for so much malloc pool before
relocation in spl stage as the normal u-boot stage.
Use CONFIG_VAL(SYS_MALLOC_F_LEN) to fit this condition.

Signed-off-by: Andy Yan <andy.yan at rock-chips.com>

---

Changes in v3:
- use CONFIG_VAL(), which suggested by Simon

Changes in v2: None

 arch/microblaze/cpu/start.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 79dc0cf..baf4f51 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -31,8 +31,8 @@ _start:
 	mts	rshr, r1
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 #else
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
-	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_SYS_MALLOC_F_LEN
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
+	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
 #else
 	addi	r1, r0, CONFIG_SYS_INIT_SP_OFFSET
 #endif
@@ -162,14 +162,14 @@ clear_bss:
 #ifndef CONFIG_SPL_BUILD
 	or	r5, r0, r0	/* flags - empty */
 	addi    r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
 	addi	r6, r0, CONFIG_SYS_INIT_SP_OFFSET
 	swi	r6, r31, GD_MALLOC_BASE
 #endif
 	brai	board_init_f
 #else
 	addi	r31, r0, _gd
-#if defined(CONFIG_SYS_MALLOC_F_LEN)
+#if CONFIG_VAL(SYS_MALLOC_F_LEN)
 	addi	r6, r0, CONFIG_SPL_STACK_ADDR
 	swi	r6, r31, GD_MALLOC_BASE
 #endif
-- 
2.7.4