[U-Boot] [U-Boot,3/4] rockchip: clk: update dwmmc clock div

[Philipp Tomsich]

> dwmmc controller has default internal divider by 2,
> sync code for all Rockchip SoC with:
> 4055b46 rockchip: clk: rk3288: fix mmc clock setting
> 
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
> 
>  drivers/clk/rockchip/clk_rk3036.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3188.c |  4 ++--
>  drivers/clk/rockchip/clk_rk322x.c |  6 +++---
>  drivers/clk/rockchip/clk_rk3328.c |  8 ++++----
>  drivers/clk/rockchip/clk_rk3399.c | 11 +++++++----
>  5 files changed, 19 insertions(+), 16 deletions(-)
> 

Acked-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>