[U-Boot] [PATCH 3/3] arm: socfpga: Enable FPGA bridge in gen5 U-boot
Marek Vasut
marex at denx.de
Thu Jul 27 09:39:11 UTC 2017
On 07/27/2017 11:26 AM, Chee, Tien Fong wrote:
> On Kha, 2017-07-27 at 10:24 +0200, Marek Vasut wrote:
>> On 07/27/2017 06:36 AM, tien.fong.chee at intel.com wrote:
>>>
>>> From: Tien Fong Chee <tien.fong.chee at intel.com>
>>>
>>> Enable FPGA bridge in gen5 U-boot instead of gen5 SPL because FPGA
>>> feature is not
>>> required in SPL. Remove FPGA feature in SPL can help to save some
>>> space.
>>>
>>> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
>>> ---
>>> include/configs/socfpga_common.h | 4 ++++
>>> 1 files changed, 4 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/include/configs/socfpga_common.h
>>> b/include/configs/socfpga_common.h
>>> index 9be9e79..f5b3277 100644
>>> --- a/include/configs/socfpga_common.h
>>> +++ b/include/configs/socfpga_common.h
>>> @@ -70,6 +70,10 @@
>>> #define CONFIG_CMD_PXE
>>> #define CONFIG_MENU
>>>
>>> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>>> +#define CONFIG_PREBOOT "bridge enable; echo bridge enable"
>>> +#endif
>> If someone needs to define their own preboot env, this will break.
>> If the FPGA is not programmed, this will also break.
>>
> I think we can add one new config for FPGA is programmed or not.
No
> However, i think this should be as default since most intel fpga
> devkits have this feature, but user can edit the environment in code,
> or in boot console.
Well if this hangs the kit, he cant. Most users of socfpga don't use the
devkits, but rather their own device.
> I prefer not to hard code this in the code like
> what previously doing in gen5. DO you have any better idea?
I think there's a reason for that code, see my reply to 1/3.
It has to do with the remapping of first 1 MiB of RAM on the Gen5.
--
Best regards,
Marek Vasut
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