[U-Boot] [PATCH v2 44/56] net: gmac_rockchip: Add support for the RK3368 GMAC

Dr. Philipp Tomsich philipp.tomsich at theobroma-systems.com
Fri Jul 28 08:41:30 UTC 2017


> On 28 Jul 2017, at 05:39, Simon Glass <sjg at chromium.org> wrote:
> 
> Hi Philipp,
> 
> On 26 July 2017 at 04:40, Philipp Tomsich
> <philipp.tomsich at theobroma-systems.com> wrote:
>> The GMAC in the RK3368 once again is identical to the incarnation in
>> the RK3288 and the RK3399, except for where some of the configuration
>> and control registers are located in the GRF.
>> 
>> This adds the RK3368-specific logic necessary to reuse this driver.
>> 
>> Signed-off-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
>> 
>> ---
>> 
>> Changes in v2:
>> - moves the bit-definitions (for GRF registers) specific to the GMAC
>>  into the GMAC driver: these include interface speed selection and
>>  configuring the RGMII output mode
>> 
>> arch/arm/include/asm/arch-rockchip/grf_rk3368.h |  1 +
>> drivers/net/gmac_rockchip.c                     | 78 +++++++++++++++++++++++++
>> 2 files changed, 79 insertions(+)
>> 
>> diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
>> index ec42d7a..1f84ff9 100644
>> --- a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
>> +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
>> @@ -129,4 +129,5 @@ enum {
>>        MCU_CODE_BASE_BIT31_BIT28_SHIFT         = 0,
>>        MCU_CODE_BASE_BIT31_BIT28_MASK          = GENMASK(3, 0),
>> };
>> +
>> #endif
>> diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
>> index c9f9e83..586ccbf 100644
>> --- a/drivers/net/gmac_rockchip.c
>> +++ b/drivers/net/gmac_rockchip.c
>> @@ -16,6 +16,7 @@
>> #include <asm/arch/clock.h>
>> #include <asm/arch/hardware.h>
>> #include <asm/arch/grf_rk3288.h>
>> +#include <asm/arch/grf_rk3368.h>
>> #include <asm/arch/grf_rk3399.h>
>> #include <dm/pinctrl.h>
>> #include <dt-bindings/clock/rk3288-cru.h>
>> @@ -83,6 +84,38 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)
>>        return 0;
>> }
>> 
>> +static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)
> 
> What is the plan here? Can we use a ioctl() interface to the grf
> syscon perhaps, to remove this SoC-specific code from the driver?

Indeed. This is the longer-term plan.

Regards,
Philipp.


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