[U-Boot] [PATCH v7 07/10] usb: dwc3: Add dwc3 glue driver support for STi
Patrice CHOTARD
patrice.chotard at st.com
Mon Jun 5 06:40:11 UTC 2017
Hi Marek
On 06/03/2017 08:06 AM, Marek Vasut wrote:
> On 06/01/2017 02:05 PM, patrice.chotard at st.com wrote:
>> From: Patrice Chotard <patrice.chotard at st.com>
>>
>> This patch adds the ST glue logic to manage the DWC3 HC
>> on STiH407 SoC family. It configures the internal glue
>> logic and syscfg registers.
>>
>> Part of this code been extracted from kernel.org driver
>> (drivers/usb/dwc3/dwc3-st.c)
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard at st.com>
>> Reviewed-by: Simon Glass <sjg at chromium.org>
>> ---
>>
>> v7: _ none
>>
>> v6: _ add reviewed-by Simon Glass
>> _ put #define <common.h> first
>>
>> v5: _ none
>>
>> v4: _ none
>>
>> v3: _ rename dwc3-sti.c to dwc3-sti-glue.c
>> _ respect device tree hierarchy, this driver is now responsible
>> for xhci-sti binding (done in sti_dwc3_glue_bind())
>>
>> v2: _ use setbits_le32() instead of read, modify, write sequence
>> _ add missing parenthesis
>>
>> arch/arm/include/asm/arch-stih410/sys_proto.h | 11 ++
>> doc/device-tree-bindings/usb/dwc3-st.txt | 60 ++++++
>> drivers/usb/host/Kconfig | 9 +
>> drivers/usb/host/Makefile | 1 +
>> drivers/usb/host/dwc3-sti-glue.c | 256 ++++++++++++++++++++++++++
>> include/dwc3-sti-glue.h | 43 +++++
>> 6 files changed, 380 insertions(+)
>> create mode 100644 arch/arm/include/asm/arch-stih410/sys_proto.h
>> create mode 100644 doc/device-tree-bindings/usb/dwc3-st.txt
>> create mode 100644 drivers/usb/host/dwc3-sti-glue.c
>> create mode 100644 include/dwc3-sti-glue.h
>>
>> diff --git a/arch/arm/include/asm/arch-stih410/sys_proto.h b/arch/arm/include/asm/arch-stih410/sys_proto.h
>> new file mode 100644
>> index 0000000..5c40d3b
>> --- /dev/null
>> +++ b/arch/arm/include/asm/arch-stih410/sys_proto.h
>> @@ -0,0 +1,11 @@
>> +/*
>> + * Copyright (c) 2017
>> + * Patrice Chotard <patrice.chotard at st.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef _ASM_ARCH_SYS_PROTO_H
>> +#define _ASM_ARCH_SYS_PROTO_H
>> +
>> +#endif /* _ASM_ARCH_SYS_PROTO_H */
>> diff --git a/doc/device-tree-bindings/usb/dwc3-st.txt b/doc/device-tree-bindings/usb/dwc3-st.txt
>> new file mode 100644
>> index 0000000..a26a139
>> --- /dev/null
>> +++ b/doc/device-tree-bindings/usb/dwc3-st.txt
>> @@ -0,0 +1,60 @@
>> +ST DWC3 glue logic
>
> Is this DT binding imported from Linux ?
Yes
>
>> +This file documents the parameters for the dwc3-st driver.
>> +This driver controls the glue logic used to configure the dwc3 core on
>> +STiH407 based platforms.
>> +
>> +Required properties:
>> + - compatible : must be "st,stih407-dwc3"
>> + - reg : glue logic base address and USB syscfg ctrl register offset
>> + - reg-names : should be "reg-glue" and "syscfg-reg"
>> + - st,syscon : should be phandle to system configuration node which
>> + encompasses the glue registers
>> + - resets : list of phandle and reset specifier pairs. There should be two entries, one
>> + for the powerdown and softreset lines of the usb3 IP
>> + - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
>> +
>> + - #address-cells, #size-cells : should be '1' if the device has sub-nodes
>> + with 'reg' property
>> +
>> + - pinctl-names : A pinctrl state named "default" must be defined
>> +
>> + - pinctrl-0 : Pin control group
>> +
>> + - ranges : allows valid 1:1 translation between child's address space and
>> + parent's address space
>> +
>> +Sub-nodes:
>> +The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
>> +example below.
>> +
>> +NB: The dr_mode property is NOT optional for this driver, as the default value
>> +is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are
>> +either "host" or "device".
>> +
[...]
>> +static int sti_dwc3_glue_probe(struct udevice *dev)
>> +{
>> + struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
>> + int ret;
>> +
>> + /* deassert both powerdown and softreset */
>> + ret = reset_deassert(&plat->powerdown_ctl);
>> + if (ret < 0) {
>> + error("DWC3 powerdown reset deassert failed: %d", ret);
>> + return ret;
>> + }
>> +
>> + ret = reset_deassert(&plat->softreset_ctl);
>> + if (ret < 0) {
>> + error("DWC3 soft reset deassert failed: %d", ret);
>> + goto err1;
>> + }
>> +
>> + ret = sti_dwc3_glue_drd_init(plat);
>> + if (ret)
>> + goto err2;
>> +
>> + sti_dwc3_glue_init(plat);
>> +
>> + return 0;
>> +
>> +err2:
>
> Invent some more descriptive failpath label names please
Ok
>
>> + ret = reset_assert(&plat->softreset_ctl);
>> + if (ret < 0) {
>> + error("DWC3 soft reset deassert failed: %d", ret);
>> + return ret;
>> + }
>> +
>> +err1:
>> + ret = reset_assert(&plat->powerdown_ctl);
>> + if (ret < 0)
>> + error("DWC3 powerdown reset deassert failed: %d", ret);
>> +
>> + return ret;
>> +}
>> +
>> +static int sti_dwc3_glue_remove(struct udevice *dev)
>> +{
>> + struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
>> + int ret;
>> +
>> + /* assert both powerdown and softreset */
>> + ret = reset_assert(&plat->powerdown_ctl);
>> + if (ret < 0) {
>> + error("DWC3 powerdown reset deassert failed: %d", ret);
>> + return ret;
>> + }
>> +
>> + ret = reset_assert(&plat->softreset_ctl);
>> + if (ret < 0)
>> + error("DWC3 soft reset deassert failed: %d", ret);
>> +
>> + return ret;
>> +}
>> +
>> +static const struct udevice_id sti_dwc3_glue_ids[] = {
>> + { .compatible = "st,stih407-dwc3" },
>> + { }
>> +};
>> +
>> +U_BOOT_DRIVER(dwc3_sti_glue) = {
>> + .name = "dwc3_sti_glue",
>> + .id = UCLASS_MISC,
>> + .of_match = sti_dwc3_glue_ids,
>> + .ofdata_to_platdata = sti_dwc3_glue_ofdata_to_platdata,
>> + .probe = sti_dwc3_glue_probe,
>> + .remove = sti_dwc3_glue_remove,
>> + .bind = sti_dwc3_glue_bind,
>> + .platdata_auto_alloc_size = sizeof(struct sti_dwc3_glue_platdata),
>> + .flags = DM_FLAG_ALLOC_PRIV_DMA,
>> +};
>> diff --git a/include/dwc3-sti-glue.h b/include/dwc3-sti-glue.h
>> new file mode 100644
>> index 0000000..2083427
>> --- /dev/null
>> +++ b/include/dwc3-sti-glue.h
>> @@ -0,0 +1,43 @@
>> +/*
>> + * Copyright (c) 2017
>> + * Patrice Chotard <patrice.chotard at st.com>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __DWC3_STI_UBOOT_H_
>> +#define __DWC3_STI_UBOOT_H_
>> +
>> +#include <linux/usb/otg.h>
>
> Does this have to be in a separate header file ?
This is needed for enum usb_dr_mode used in int sti_dwc3_init()
prototype below.
>
>> +/* glue registers */
>> +#define CLKRST_CTRL 0x00
>> +#define AUX_CLK_EN BIT(0)
>> +#define SW_PIPEW_RESET_N BIT(4)
>> +#define EXT_CFG_RESET_N BIT(8)
>> +
>> +#define XHCI_REVISION BIT(12)
>> +
>> +#define USB2_VBUS_MNGMNT_SEL1 0x2C
>> +#define USB2_VBUS_UTMIOTG 0x1
>> +
>> +#define SEL_OVERRIDE_VBUSVALID(n) ((n) << 0)
>> +#define SEL_OVERRIDE_POWERPRESENT(n) ((n) << 4)
>> +#define SEL_OVERRIDE_BVALID(n) ((n) << 8)
>> +
>> +/* Static DRD configuration */
>> +#define USB3_CONTROL_MASK 0xf77
>> +
>> +#define USB3_DEVICE_NOT_HOST BIT(0)
>> +#define USB3_FORCE_VBUSVALID BIT(1)
>> +#define USB3_DELAY_VBUSVALID BIT(2)
>> +#define USB3_SEL_FORCE_OPMODE BIT(4)
>> +#define USB3_FORCE_OPMODE(n) ((n) << 5)
>> +#define USB3_SEL_FORCE_DPPULLDOWN2 BIT(8)
>> +#define USB3_FORCE_DPPULLDOWN2 BIT(9)
>> +#define USB3_SEL_FORCE_DMPULLDOWN2 BIT(10)
>> +#define USB3_FORCE_DMPULLDOWN2 BIT(11)
>> +
>> +int sti_dwc3_init(enum usb_dr_mode mode);
>> +
>> +#endif /* __DWC3_STI_UBOOT_H_ */
>>
>
>
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