[U-Boot] [PATCH 1/2] pinctrl: a3700: Fix uart2 group selection register mask

[Stefan Roese]

Hi Ken,

On 22.06.2017 11:13, make at marvell.com wrote:
> From: Ken Ma <make at marvell.com>
> 
> If north bridge selection register bit1 is clear, pins [10:8] are for
> SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for
> GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn
> and CTSn, so bit1 should be added to uart2 group and it must be set
> for both "gpio" and "uart" functions of uart2 group.
> 
> Signed-off-by: Ken Ma <make at marvell.com>
> Cc: Stefan Roese <sr at denx.de>
> Cc: Kostya Porotchkin <kostap at marvell.com>
> Cc: Gregory CLEMENT <gregory.clement at free-electrons.com>
> Cc: Nadav Haklai <nadavh at marvell.com>
> Cc: Wilson Ding <dingwei at marvell.com>

Thanks for the the patches. One remark though about the patch
submission process:

You should mark version of your patches and list the changes (patch
history) in the patch as described here:

http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions

This makes the review process much easier, as the reviewer does not need
to review the whole patch again, but only need to look for the new
changes in new version.

You don't need to do it for these patches, but please do it the
next time.

For this patch:

Reviewed-by: Stefan Roese <sr at denx.de>

Thanks,
Stefan