[U-Boot] [PATCH v1 17/41] net: mvpp2: adapt the mvpp2_rxq_*_pool_set functions to PPv2.2

Joe Hershberger joe.hershberger at gmail.com
Tue Mar 21 17:21:00 UTC 2017


On Tue, Mar 21, 2017 at 9:27 AM, Stefan Roese <sr at denx.de> wrote:
> From: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
>
> The MVPP2_RXQ_CONFIG_REG register has a slightly different layout
> between PPv2.1 and PPv2.2, so this commit adapts the functions modifying
> this register to accommodate for both the PPv2.1 and PPv2.2 cases.
>
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
> Signed-off-by: Stefan Roese <sr at denx.de>

Acked-by: Joe Hershberger <joe.hershberger at ni.com>

> ---
>
>  drivers/net/mvpp2.c | 19 ++++++++++++-------
>  1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
> index c5ac6d1b7f..edd985910c 100644
> --- a/drivers/net/mvpp2.c
> +++ b/drivers/net/mvpp2.c
> @@ -91,9 +91,11 @@ do {                                                                 \
>  #define     MVPP2_SNOOP_PKT_SIZE_MASK          0x1ff
>  #define     MVPP2_SNOOP_BUF_HDR_MASK           BIT(9)
>  #define     MVPP2_RXQ_POOL_SHORT_OFFS          20
> -#define     MVPP2_RXQ_POOL_SHORT_MASK          0x700000
> +#define     MVPP21_RXQ_POOL_SHORT_MASK         0x700000
> +#define     MVPP22_RXQ_POOL_SHORT_MASK         0xf00000

I guess these are just defined for completeness? Never used? Maybe
just drop them?

Obviously not important, so up to you.

>  #define     MVPP2_RXQ_POOL_LONG_OFFS           24
> -#define     MVPP2_RXQ_POOL_LONG_MASK           0x7000000
> +#define     MVPP21_RXQ_POOL_LONG_MASK          0x7000000
> +#define     MVPP22_RXQ_POOL_LONG_MASK          0xf000000
>  #define     MVPP2_RXQ_PACKET_OFFSET_OFFS       28
>  #define     MVPP2_RXQ_PACKET_OFFSET_MASK       0x70000000
>  #define     MVPP2_RXQ_DISABLE_MASK             BIT(31)
> @@ -2468,17 +2470,20 @@ static int mvpp2_bm_init(struct udevice *dev, struct mvpp2 *priv)
>  static void mvpp2_rxq_long_pool_set(struct mvpp2_port *port,
>                                     int lrxq, int long_pool)
>  {
> -       u32 val;
> +       u32 val, mask;
>         int prxq;
>
>         /* Get queue physical ID */
>         prxq = port->rxqs[lrxq]->id;
>
> -       val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq));
> -       val &= ~MVPP2_RXQ_POOL_LONG_MASK;
> -       val |= ((long_pool << MVPP2_RXQ_POOL_LONG_OFFS) &
> -                   MVPP2_RXQ_POOL_LONG_MASK);
> +       if (port->priv->hw_version == MVPP21)
> +               mask = MVPP21_RXQ_POOL_LONG_MASK;
> +       else
> +               mask = MVPP22_RXQ_POOL_LONG_MASK;
>
> +       val = mvpp2_read(port->priv, MVPP2_RXQ_CONFIG_REG(prxq));
> +       val &= ~mask;
> +       val |= (long_pool << MVPP2_RXQ_POOL_LONG_OFFS) & mask;
>         mvpp2_write(port->priv, MVPP2_RXQ_CONFIG_REG(prxq), val);
>  }
>
> --
> 2.12.0
>
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