[U-Boot] [PATCH] sunxi: set the default CPUx frequency of H5 to 816MHz

Icenowy Zheng icenowy at aosc.io
Wed Nov 1 00:31:46 UTC 2017


在 2017-10-31 21:54,Maxime Ripard 写道:
> On Tue, Oct 31, 2017 at 04:05:36PM +0800, icenowy at aosc.io wrote:
>> 在 2017-10-31 15:57,Jagan Teki 写道:
>> > On Tue, Oct 31, 2017 at 5:06 AM, Icenowy Zheng <icenowy at aosc.io> wrote:
>> > > Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano
>> > > Pi
>> > > NEO2), which may not work properly at 1008MHz if the chip's quality is
>> > > not so good.
>> > >
>> > > Lower the default CPUx frequency of H5 to 816MHz.
>> > >
>> > > Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
>> > > ---
>> > >  arch/arm/mach-sunxi/Kconfig | 2 +-
>> > >  1 file changed, 1 insertion(+), 1 deletion(-)
>> > >
>> > > diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
>> > > index 09cfec6f57..1fededd0a3 100644
>> > > --- a/arch/arm/mach-sunxi/Kconfig
>> > > +++ b/arch/arm/mach-sunxi/Kconfig
>> > > @@ -397,9 +397,9 @@ config SYS_CLK_FREQ
>> > >         default 1008000000 if MACH_SUN5I
>> > >         default 1008000000 if MACH_SUN6I
>> > >         default 912000000 if MACH_SUN7I
>> > > +       default 816000000 if MACH_SUN50I || MACH_SUN50I_H5
>> > >         default 1008000000 if MACH_SUN8I
>> >
>> > Even orangepi pc2 has 1.1v after power-on and it's work fine [1] did
>> > you find an issue with neo2?
> 
> So you have one single model that fails, and you change the default
> frequency of all the boards using that SoC?

But I think we have already set the default frequency to 816MHz for
A64, and it seems that several H5 boards are designed to start at 1.1v
(see the notes by Jagan above).

> 
> It seems a bit overkill.
> 
> I guess we have two solutions:
>   1) Change the frequency in that board config
>   2) Change the voltage in that board config

NEO2 don't have any voltage adjusting, it's fixed at 1.1V.

And according to the Orange Pi PC2 and Prime schematics, they both
start at 1.1V. (The Prime schematics even says "For H5 adjust
VDD-CPUX to 1.1V).

> 
> There's no need to enforce a SoC-wide change.
> 
> Maxime


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