[U-Boot] [PATCH 07/40] arm64: zynqmp: Label whole PL part as fpga_full region

[Michal Simek]

From: Nava kishore Manne <nava.manne at xilinx.com>

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <navam at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

 arch/arm/dts/zynqmp.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 3dd17e6c3f1e..877874e7bf1c 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -282,7 +282,14 @@
 		compatible = "arm,cortex-a53-edac";
 	};
 
-	pcap {
+	fpga_full: fpga-full {
+		compatible = "fpga-region";
+		fpga-mgr = <&pcap>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+	};
+
+	pcap: pcap {
 		compatible = "xlnx,zynqmp-pcap-fpga";
 	};
 
-- 
1.9.1