[U-Boot] [PATCH 0/3] MIPS: Caching fixes

[Paul Burton]

Hi Daniel,

On Tue, Nov 21, 2017 at 08:57:15PM +0100, Daniel Schwierzeck wrote:
> Am 21.11.2017 um 20:18 schrieb Paul Burton:
> > This short series fixes a few issues related to our caching code - with
> > regards to DMA coherence, instruction cache coherence & systems with no
> > caches at all.
> > 
> > Applies atop u-boot-mips/next as of d7d9fc01a4ef ("Update Paul Burton's
> > email address").
> > 
> > 
> > Paul Burton (3):
> >   MIPS: Ensure cache ops complete in cache maintenance functions
> >   MIPS: Clear instruction hazards in flush_cache()
> >   MIPS: Break out of cache loops for unimplemented caches
> > 
> >  arch/mips/include/asm/system.h | 13 +++++++++++++
> >  arch/mips/lib/cache.c          | 30 ++++++++++++++++++++++--------
> >  2 files changed, 35 insertions(+), 8 deletions(-)
> > 
> 
> series applied to u-boot-mips, thanks.

Great - thanks for your prompt response :)

> Do you have further patches for this merge windows? I'll wait with the
> pull request then.

I have some patches for Boston which I've been tidying up & am just
waiting on buildman to finish testing, but they do touch other areas
than arch/mips & board/imgtec/boston so I'll understand if you don't
want to hold things up on waiting for reviews.

I also have a port to the SEAD-3 platform, another development board we
use for smaller cores, which is in fairly good shape but similarly would
need review from some others.

Thanks,
    Paul