[U-Boot] [PATCH] armv8: shrink exception table code

[Andre Przywara]

In the moment our exception entry code needs 34 instructions, so we
can't use put it directly into the table entry, which offers "only"
32 instructions there. Right now we just put an unconditional branch
there, then use a macro to place the 34 instructions *per entry* after
that. That effectivly doubles the size of our exception table, which
is quite a waste, given that we use it mostly for debugging purposes.

Since the register saving part is actually identical, let's just convert
that macro into a function, and "bl" into it directly from the exception
slot, of course after having saved at least the original LR.
This saves us about 950 bytes of code, which is quite a relief for some
tight SPLs, in particular the 64-bit Allwinner ones.

Signed-off-by: Andre Przywara <andre.przywara at arm.com>
---
Hi,

this is admittedly the lowest hanging fruit to save code size with the
exception table. Philipp ran into overflows with some FIT refactoring,
I hope this mitigates the problem for now.
More areas to explore:
- In the moment the 2K alignment hits us more or less randomly. In the
very space-constraint 64-bit Allwinner SPLs there is a whopping 1600 bytes
of padding to match the architecturally required alignment of the
vector table. By finding a better place for the vector table with minimal
padding we can save most of this.
- The actual exception table is pretty uniform, so one could think about
actually constructing it with some code. This would allow to place it anywhere
in SRAM, easily complying with the 2K alignment without impacting the actual
SPL code.
- As far as I can tell this is mostly for debugging (at least for the SPL),
since we seem to have only handlers which dump registers and then panic.
So we could introduce a PANIC_EXCEPTION symbol, where we don't need to save
registers, or could actually even drop the exception table at all. This
would save another 2.5 KB for 64-bit Allwinner SoCs, for instance.

Cheers,
Andre.

 arch/arm/cpu/armv8/exceptions.S | 129 +++++++++++++++++-----------------------
 1 file changed, 56 insertions(+), 73 deletions(-)

diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S
index 4f4f526f93..8c7c1d3eb8 100644
--- a/arch/arm/cpu/armv8/exceptions.S
+++ b/arch/arm/cpu/armv8/exceptions.S
@@ -11,13 +11,66 @@
 #include <asm/macro.h>
 #include <linux/linkage.h>
 
+/*
+ * Exception vectors.
+ */
+	.align	11
+	.globl	vectors
+vectors:
+	.align	7		/* Current EL Synchronous Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_sync
+	b	exception_exit
+
+	.align	7		/* Current EL IRQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_irq
+	b	exception_exit
+
+	.align	7		/* Current EL FIQ Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_fiq
+	b	exception_exit
+
+	.align	7		/* Current EL Error Thread */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_bad_error
+	b	exception_exit
+
+	.align	7		 /* Current EL Synchronous Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_sync
+	b	exception_exit
+
+	.align	7		 /* Current EL IRQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_irq
+	b	exception_exit
+
+	.align	7		 /* Current EL FIQ Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_fiq
+	b	exception_exit
+
+	.align	7		 /* Current EL Error Handler */
+	stp	x29, x30, [sp, #-16]!
+	bl	_exception_entry
+	bl	do_error
+	b	exception_exit
+
 /*
  * Enter Exception.
  * This will save the processor state that is ELR/X0~X30
  * to the stack frame.
  */
-.macro	exception_entry
-	stp	x29, x30, [sp, #-16]!
+_exception_entry:
 	stp	x27, x28, [sp, #-16]!
 	stp	x25, x26, [sp, #-16]!
 	stp	x23, x24, [sp, #-16]!
@@ -46,78 +99,8 @@
 0:
 	stp	x2, x0, [sp, #-16]!
 	mov	x0, sp
-.endm
+	ret
 
-/*
- * Exception vectors.
- */
-	.align	11
-	.globl	vectors
-vectors:
-	.align	7
-	b	_do_bad_sync	/* Current EL Synchronous Thread */
-
-	.align	7
-	b	_do_bad_irq	/* Current EL IRQ Thread */
-
-	.align	7
-	b	_do_bad_fiq	/* Current EL FIQ Thread */
-
-	.align	7
-	b	_do_bad_error	/* Current EL Error Thread */
-
-	.align	7
-	b	_do_sync	/* Current EL Synchronous Handler */
-
-	.align	7
-	b	_do_irq		/* Current EL IRQ Handler */
-
-	.align	7
-	b	_do_fiq		/* Current EL FIQ Handler */
-
-	.align	7
-	b	_do_error	/* Current EL Error Handler */
-
-
-_do_bad_sync:
-	exception_entry
-	bl	do_bad_sync
-	b	exception_exit
-
-_do_bad_irq:
-	exception_entry
-	bl	do_bad_irq
-	b	exception_exit
-
-_do_bad_fiq:
-	exception_entry
-	bl	do_bad_fiq
-	b	exception_exit
-
-_do_bad_error:
-	exception_entry
-	bl	do_bad_error
-	b	exception_exit
-
-_do_sync:
-	exception_entry
-	bl	do_sync
-	b	exception_exit
-
-_do_irq:
-	exception_entry
-	bl	do_irq
-	b	exception_exit
-
-_do_fiq:
-	exception_entry
-	bl	do_fiq
-	b	exception_exit
-
-_do_error:
-	exception_entry
-	bl	do_error
-	b	exception_exit
 
 exception_exit:
 	ldp	x2, x0, [sp],#16
-- 
2.14.1