[U-Boot] [RFC PATCH 06/13] arm: add basic framework for Nexell S5P6818 support

[Andre Przywara]

The Nexell S5P6818 is a typical SoC with ARM Cortex-A53 cores.
It has many peripherals derived from Samsung SoCs (MMC, serial, I2C,
Ethernet, ...).
Add the required files to introduce this new SoC (family?) to U-Boot.

Signed-off-by: Andre Przywara <andre.przywara at arm.com>
---
 arch/arm/Kconfig              |  6 ++++++
 arch/arm/Makefile             |  1 +
 arch/arm/mach-nexell/Kconfig  |  9 +++++++++
 arch/arm/mach-nexell/Makefile |  7 +++++++
 arch/arm/mach-nexell/board.c  | 41 +++++++++++++++++++++++++++++++++++++++++
 include/configs/s5p6818.h     | 33 +++++++++++++++++++++++++++++++++
 6 files changed, 97 insertions(+)
 create mode 100644 arch/arm/mach-nexell/Kconfig
 create mode 100644 arch/arm/mach-nexell/Makefile
 create mode 100644 arch/arm/mach-nexell/board.c
 create mode 100644 include/configs/s5p6818.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index cfde0758ef..c11e3f1f85 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -652,6 +652,10 @@ config ARCH_MX5
 	select CPU_V7
 	select BOARD_EARLY_INIT_F
 
+config ARCH_NEXELL
+	bool "Nexell S5P support"
+	select ARM64
+
 config ARCH_QEMU
 	bool "QEMU Virtual Platform"
 	select CPU_V7
@@ -1197,6 +1201,8 @@ source "arch/arm/mach-imx/mx6/Kconfig"
 
 source "arch/arm/mach-imx/mx5/Kconfig"
 
+source "arch/arm/mach-nexell/Kconfig"
+
 source "arch/arm/mach-omap2/Kconfig"
 
 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 0e0ae77822..d71d50a1f4 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -61,6 +61,7 @@ machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
 machine-$(CONFIG_KIRKWOOD)		+= kirkwood
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
+machine-$(CONFIG_ARCH_NEXELL)		+= nexell
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
 machine-$(CONFIG_ORION5X)		+= orion5x
diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig
new file mode 100644
index 0000000000..71aa5e641d
--- /dev/null
+++ b/arch/arm/mach-nexell/Kconfig
@@ -0,0 +1,9 @@
+if ARCH_NEXELL
+
+config SYS_SOC
+    default "nexell"
+
+config SYS_CONFIG_NAME
+    default "s5p6818"
+
+endif
diff --git a/arch/arm/mach-nexell/Makefile b/arch/arm/mach-nexell/Makefile
new file mode 100644
index 0000000000..bf103480bb
--- /dev/null
+++ b/arch/arm/mach-nexell/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Andre Przywara <andre.przywara at arm.com>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= board.o
diff --git a/arch/arm/mach-nexell/board.c b/arch/arm/mach-nexell/board.c
new file mode 100644
index 0000000000..f0d258b71c
--- /dev/null
+++ b/arch/arm/mach-nexell/board.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2017 Andre Przywara <andre.przywara at arm.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* TODO: dummy implementation for now, add proper reset code */
+void reset_cpu(ulong addr)
+{
+}
+
+/* TODO: enhance when multiple SoCs are supported (S5P4418) */
+int print_cpuinfo(void)
+{
+	puts("CPU:   Nexell S5P6818\n");
+
+	return 0;
+}
+
+/* TODO: dummy for now, either implement DRAM init or rely on vendor code */
+int dram_init(void)
+{
+	/* TODO: hard coded for now, read from DT? */
+	gd->ram_size = 0x40000000;
+
+	return 0;
+}
+
+ulong get_tbclk(void)
+{
+	return CONFIG_SYS_HZ;
+}
+
+int board_init(void)
+{
+	return 0;
+}
diff --git a/include/configs/s5p6818.h b/include/configs/s5p6818.h
new file mode 100644
index 0000000000..4d394dbec9
--- /dev/null
+++ b/include/configs/s5p6818.h
@@ -0,0 +1,33 @@
+#ifndef __CONFIG_S5P6818_H
+#define __CONFIG_S5P6818_H
+
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_ENV_SIZE			(128 << 10)
+#define CONFIG_SYS_MAX_FLASH_BANKS	0
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+
+#define CONFIG_EXTRA_ENV_SETTINGS	"fdt_high=0xffffffffffffffff"
+
+/* using SRAM for SPL init here */
+#define CONFIG_SYS_INIT_RAM_ADDR	0xffff0000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x10000  /* 64 KiB */
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+		(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_NR_DRAM_BANKS		1
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
+
+#define CONFIG_SYS_TEXT_BASE		0x42c00000
+#define CONFIG_SYS_LOAD_ADDR		0x41000000
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
+
+#define CONFIG_SYS_TIMER_COUNTER	0xc0017040	/* TCNTO4 */
+
+#endif	/* __CONFIG_H */
-- 
2.14.1