[U-Boot] [PATCH 2/2] armv8: ls1043a: Discard the needless cpu nodes
Wenbin Song
wenbin.song at nxp.com
Thu Nov 30 09:56:48 UTC 2017
Hi Prabhakar,
In my opinion, this is a common feature for all Layerscapes. As I know, all chips belonged to Layerscape have the capacity to disable some cores, just like ls1043a /ls1023a.
If we will support another variant in the future, for example: ls1046a/ls1026a, just configure it rather than modify the codes.
Am I correct?
Best Regards
Wenbin Song
-----Original Message-----
From: Prabhakar Kushwaha
Sent: Thursday, November 30, 2017 12:56 PM
To: Wenbin Song <wenbin.song at nxp.com>; York Sun <york.sun at nxp.com>; Ran Wang <ran.wang_1 at nxp.com>; Mingkai Hu <mingkai.hu at nxp.com>; u-boot at lists.denx.de
Cc: Wenbin Song <wenbin.song at nxp.com>
Subject: RE: [PATCH 2/2] armv8: ls1043a: Discard the needless cpu nodes
> -----Original Message-----
> From: Wenbin song [mailto:wenbin.song at nxp.com]
> Sent: Thursday, November 30, 2017 8:27 AM
> To: York Sun <york.sun at nxp.com>; Prabhakar Kushwaha
> <prabhakar.kushwaha at nxp.com>; Ran Wang <ran.wang_1 at nxp.com>; Mingkai
> Hu <mingkai.hu at nxp.com>; u-boot at lists.denx.de
> Cc: Wenbin Song <wenbin.song at nxp.com>
> Subject: [PATCH 2/2] armv8: ls1043a: Discard the needless cpu nodes
>
> Using "cpu_pos_mask()" function to detect the real online cpus, and
> discard the needless cpu nodes on kernel dft.
>
> Signed-off-by: Wenbin Song <wenbin.song at nxp.com>
> ---
> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++
> arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 32
> +++++++++++++++++++++++++++++++
> 2 files changed, 36 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index 47145a2432..971a98c6cc 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -176,6 +176,10 @@ config HAS_FEATURE_ENHANCED_MSI
> bool
> default y if ARCH_LS1043A
>
> +config DISCARD_OFFLINE_CPU_NODES
> + bool
> + default y if ARCH_LS1043A
> +
As per understanding this feature is for taking care of SoC personalities with reduced cores.
Why a new config is required? Why cannot this be taken care at run time by reading SVR.
-pk
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