[U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

[Eric Nelson]

Hi all,

Adding my normal e-mail account to the chain, since the other account
isn't registered on the list.

On 09/04/2017 07:37 PM, Eric Nelson wrote:
> Hi Peng,
> 
> Pardon the reference to an old update, but do you have a description
> of the symptoms that brought about this patch?
> 
> On 03/09/2016 01:07 AM, Peng Fan wrote:
>> The CONFIG_IPUV3_CLK should be 264000000, to i.MX6DL, it should be
>> 198000000.
>>
>> Signed-off-by: Peng Fan <van.freenix at gmail.com>
>> Signed-off-by: Sandor Yu <sandor.yu at nxp.com>
>> Cc: Stefano Babic <sbabic at denx.de>
>> Cc: Fabio Estevam <fabio.estevam at nxp.com>
>> Cc: Peter Robinson <pbrobinson at gmail.com>
>> ---
>>   include/configs/mx6sabre_common.h | 6 +++++-
>>   1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/configs/mx6sabre_common.h 
>> b/include/configs/mx6sabre_common.h
>> index 29d1f91..a6d821b 100644
>> --- a/include/configs/mx6sabre_common.h
>> +++ b/include/configs/mx6sabre_common.h
>> @@ -225,7 +225,11 @@
>>   #define CONFIG_BMP_16BPP
>>   #define CONFIG_VIDEO_LOGO
>>   #define CONFIG_VIDEO_BMP_LOGO
>> -#define CONFIG_IPUV3_CLK 260000000
>> +#ifdef CONFIG_MX6DL
>> +#define CONFIG_IPUV3_CLK 198000000
>> +#else
>> +#define CONFIG_IPUV3_CLK 264000000
>> +#endif
> 
> 
> Note that this should probably be applied for other boards
> which are compiled for multiple CPU types.
> 
> At least the Boundary Nitrogen boards, but probably others
> like Wand have ordering options for DL or Solo processors
> and may need the reduced clock rate.
> 
> 
>>   #define CONFIG_IMX_HDMI
>>   #define CONFIG_IMX_VIDEO_SKIP
> 
> Please advise,
> 
> 
> Eric