[U-Boot] [PATCH 4/8] clk: rockchip: Add Saradc clock support for rk3288

[David.Wu]

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Content preview:  Hi Dr.Philipp 在 2017/9/13 18:24, Dr. Philipp Tomsich 写道:
   > >> On 13 Sep 2017, at 12:09, David Wu <david.wu at rock-chips.com> wrote:
  >> > > Please add a commit message. > >> Signed-off-by: David Wu <david.wu at rock-chips.com>
   > > Reviewed-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>
  > > See above and below for requested changes. > >> --- >> drivers/clk/rockchip/clk_rk3288.c
   | 45 +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 45 insertions(+)
   >> >> diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
   >> index 478195b..29652b0 100644 >> --- a/drivers/clk/rockchip/clk_rk3288.c
   >> +++ b/drivers/clk/rockchip/clk_rk3288.c >> @@ -111,6 +111,15 @@ enum {
   >> PERI_ACLK_DIV_SHIFT = 0, >> PERI_ACLK_DIV_MASK = 0x1f << PERI_ACLK_DIV_SHIFT,
   >> >> + /* >> + * CLKSEL24 >> + * saradc_div_con: >> + * clk_saradc=24MHz/(saradc_div_con+1)
   >> + */ >> + CLK_SARADC_DIV_CON_SHIFT = 8, >> + CLK_SARADC_DIV_CON_MASK =
   0xff << CLK_SARADC_DIV_CON_SHIFT, >> + CLK_SARADC_DIV_CON_WIDTH = 8, >> +
   >> SOCSTS_DPLL_LOCK = 1 << 5, >> SOCSTS_APLL_LOCK = 1 << 6, >> SOCSTS_CPLL_LOCK
   = 1 << 7, >> @@ -131,6 +140,11 @@ static const struct pll_div apll_init_cfg
   = PLL_DIVISORS(APLL_HZ, 1, 1); >> static const struct pll_div gpll_init_cfg
   = PLL_DIVISORS(GPLL_HZ, 2, 2); >> static const struct pll_div cpll_init_cfg
   = PLL_DIVISORS(CPLL_HZ, 1, 2); >> >> +static inline u32 extract_bits(u32
  val, unsigned width, unsigned shift) >> +{ >> + return (val >> shift) & ((1
   << width) - 1); >> +} > > Please reuse what’s already available in include/bitfield.h.
   > This also applies to all call-sites for extract_bits below: they should
   directly use the already existing function. [...] 

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From: "David.Wu" <david.wu at rock-chips.com>
Subject: Re: [PATCH 4/8] clk: rockchip: Add Saradc clock support for rk3288
Date: Wed, 13 Sep 2017 19:01:29 +0800
Size: 5453
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20170913/73f084b1/attachment.mht>